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參數(shù)資料
| 型號(hào)： | LTC6410IUD-6#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 4/16頁 |
| 文件大小： | 0K |
| 描述： | IC AMP DIFF IF 16-QFN |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 放大器類型： | 差分 |
| 電路數(shù)： | 1 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 1500 V/µs |
| -3db帶寬： | 1.4GHz |
| 電壓 - 輸入偏移： | 400µV |
| 電流 - 電源： | 125mA |
| 電流 - 輸出 / 通道： | 42mA |
| 電壓 - 電源，單路/雙路(±)： | 2.8 V ~ 5.5 V，±1.4 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-QFN-EP（3x3） |
| 包裝： | 帶卷 (TR) |
LTC6410-6
12
64106fa
APPLICATIONS INFORMATION
Therefore the differential voltage gain can be calculated
as follows:
Voltage Gain = 2
RIN
RIN +RS
2.7
RL
RL +ROUT
The following is an example of the 50Ω gain calculation:
Voltage Gain = 2
58
58+50
2.7
50
50 + 22
= 2.0V/V = 6.0dB
The part also can be used with different input impedances
providing no additional voltage gain, but a higher power
gain.
For example, the calculation for a 100Ω input impedance
shows the effect of an impedance conversion. The voltage
gain is calculated as follows:
Voltage Gain = 2
83
83+100
2.7
50
50 + 22
= 1.7V/V = 4.6dB
However the power gain is:
Power Gain = 2
83
83+100
2.7
50
+ 22
2
2
= 5.8mW/mW = 7.6dB
Output Impedance
The LTC6410-6 is designed to drive a differential load of
50Ω with a total differential output resistance of 22Ω.
While the LTC6410-6 can source and sink approximately
50mA, large DC output current should be avoided. To test
the part on traditional 50Ω test equipment, AC coupling
or balun transformers (or both) may be necessary at the
input and output.
Supply Rails
Inductance in the supply path can severely effect the per-
formance of the LTC6410-6. Therefore it is recommended
that low inductance bypass capacitors are installed very
close to the part. 680pF and 0.1μF sized capacitors are
recommended. Additionally, the exposed pad of the part
must be connected to V– for low inductance and low
thermal resistance. Failure to provide a low impedance
supply at high frequencies can cause oscillations and
increased distortion.
SHDN
The SHDN pin self-biases to V+ through a 30k resistor.
The pin must be pulled below 0.8V in order to shut down
the part.
Applications Circuits
The graphs on the following page are examples of the
four differential input resistances used on the DC1103A
demo board with balun transformers for interfacing with
the 50Ω single-ended measurement equipment.
Table 1. Input Impedance
DIFFERENTIAL
SOURCE
RESISTANCE (Ω)
(RS)
EXTERNAL
TERMINATION
RESISTOR (Ω)
(REXT)
EFFECTIVE
DIFFERENTIAL
INPUT
IMPEDANCE (Ω)
(RIN)
DIFFERENTIAL
LOAD
RESISTANCE (Ω)
OUTPUT
RESISTANCE (Ω)
POWER
GAIN (dB)
VOLTAGE GAIN
(SOURCE AND
LOAD RESISTANCE
AS STATED (V/V)
NF AT 10MHz
(dB)
50
0
58
50
22
6.0
2.0
11
100
49.9
83
50
22
7.6
1.7
9
200
249
177
50
22
10.9
1.8
7
400
750
377
50
22
14.2
1.8
6
2000
Open
2000
50
22
21.5
1.9
–
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