參數(shù)資料
型號(hào)： LUCL8575BP-TR
英文描述： Dual-Resistive,Low-Cost Subscriber Line Interface Circuit(SLIC)
中文描述： 雙電阻，低成本用戶線接口電路（SLIC）
文件頁(yè)數(shù)： 26/36頁(yè)
文件大?。?/td> 633K
代理商： LUCL8575BP-TR
L8575
Dual-Resistive, Low-Cost SLIC
Advance Data Sheet
March 1997
26
Lucent Technologies Inc.
Supervision
(continued)
Fault Detection
The dc feed resistors R
1
and R
2
need to be designed to
survive lightning surges and to dissipate power associ-
ated with a Ring ground dc fault and specified ac power
cross faults—both in a sneak under and full surge type
fault.
Under certain sustained fault conditions, R
1
and R
2
could fail when they are required to survive. For this
reason, a per-channel fault detector is included on the
L8575. When the voltage across either R
1
and R
2
is a
nominal 36 V (maximum 39 V), the fault detect bit, FLT
in the serial data output, will go high, as calculated
below:
FLT = 1, if
|V
TIP
| > 36 V nominal
or
|V
RING
– V
BAT
| > 36 V nominal, which corresponds
to dc power in R
1
or R
2
> 4 W
The control logic on the line card detects FLT is high
and opens an external electromechanical relay to iso-
late the resistors from the loop, enabling the resistors
to survive extended power cross. (Note the EMR is the
test in or test out EMR, and this relay is driven by one
of the internal relay drivers on the L8575 SLIC.)
With an external 0.1
μ
F capacitor on pin CFLT, a no-
fault to fault delay of 10 ns to 30 ms is provided in the
fault detector. This prevents transients on Tip and Ring
from tripping the fault detector when a fault is not
present. There is a release delay (fault to no-fault) of
1.6 T to 2.5 T, where T is the no-fault to fault delay time.
Zero Voltage Current Cross
The L8575 provides a bit, RZA (and RZB for channel B),
in the serial data stream which gives an indication when
the ringing voltage is crossing zero. This signal bit may
be used in timing the application and removal of the
ringing signal.
Relay Drivers
Six relay drivers, three relay drivers per channel, are
included on the L8575 SLIC. The output of these driv-
ers are package nodes RDD (A&B), RDR (A&B), and
RDT (A&B). Drivers RDR (A&B) are controlled by input
bits D2 (A&B) on the serial input stream. Drivers
RDT(A&B) are controlled by input bits D3 (A&B) on the
serial input stream. In these cases, a logic 1 on D2 or
D3 activates the respective relay driver.
Relay drivers RDD (A&B) are controlled per the truth
table (see Table 2) via bits D0 (A&B) and D1 (A&B). In
order to activate driver DDR, D0 = logic 1 and
D1 = logic 0. Note that with D0 = logic 1 and
D1 = logic 0, the SLIC is set to the channel powerdown
state.
Relay drivers RDR (A&B) must be used for the Ring
relay function because the ring-trip detector is enabled
only when D2 is high; that is, when D2 operates the
ringing relay driver (RDR). Hence, the test and ringing
relay drivers are not interchangeable.
When relay driver RDD is active, the L8575 is forced
into a powerdown state. Thus, using RDD with the test-
in relay is not appropriate. This relay may be used for
test out or as a channel isolation relay.
Relay driver RDT is controlled by D3 in the serial bit
stream. Logic input D3 operates driver RDT indepen-
dent of the state of bits D0, D1, and D2. RDT may be
used with a test-in, test-out, or channel isolation relay.
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