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參數(shù)資料
| 型號(hào)： | LVX259 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | 8-Bit Addressable Latch/1-of-8 Decoder CMOS Logic Level Shifter with LSTTL−Compatible Inputs |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大小： | 114K |
| 代理商： | LVX259 |
MC74LVX259
http://onsemi.com
6
TIMING REQUIREMENTS
Input t
= t
= 3.0 ns
t
4.5
Minimum Pulse Width, Reset or Enable
(Figure 8)
(Figure 8)
V
= 2.7 V
ns
t
Minimum Setup Time, Address or Data to Enable
(Figure 8)
(Figure 8)
300
V
= 2.7 V
ns
(Figure 7 or 8)
(Figure 7 or 8)
(Figure 5)
(Figure 5)
V
= 3.3 V
±
0.3 V
V
CC
*Includes all probe and jig capacitance
Figure 10. Test Circuit
Figure 5. Switching Waveform
C
L
*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
OUTPUT
Q
DATA
IN
50%
t
PLH
t
PHL
t
f
GND
V
CC
50%
Figure 6. Switching Waveform
t
r
50%
50%
t
PHL
50%
t
PHL
DATA
IN
ADDRESS
SELECT
OUTPUT
Q
GND
V
CC
GND
V
CC
GND
Figure 7. Switching Waveform
Figure 8. Switching Waveform
Figure 9. Switching Waveform
50%
t
w
50%
t
PHL
DATA IN
OUTPUT Q
RESET
V
CC
GND
V
CC
GND
V
CC
GND
V
CC
GN
D
DATA IN
OUTPUT Q
ENABLE
DATA IN OR
ADDRESS
SELECT
ENABLE
V
CC
GND
V
CC
GND
t
w
t
w
50%
50%
50%
t
PHL
t
PHL
50%
50%
t
su
t
h(H)
t
h(H)
t
su
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