參數(shù)資料
型號(hào)： M13S2561616A-6TG
廠商： ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
元件分類： DRAM
英文描述： 4M x 16 Bit x 4 Banks Double Data Rate SDRAM
中文描述： 16M X 16 DDR DRAM, 0.75 ns, PDSO66
封裝： 0.400 X 875 INCH, 0.65 MM PITCH, LEAD FREE, TSOP2-66
文件頁(yè)數(shù)： 17/48頁(yè)
文件大?。?/td> 1232K
代理商： M13S2561616A-6TG
ES MT
M13S2561616A
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2007
Revision : 1.3 17/48
Burst Write Operation
The Burst Write command is issued by having CS , CAS and
WE
low while holding RAS high at the rising edge of the
clock (CLK). The address inputs determine the starting column address. There is no write latency relative to DQS required for burst
write cycle. The first data of a burst write cycle must be applied on the DQ pins t
DS
(Data-in setup time) prior to data strobe edge
enabled after t
DQSS
from the rising edge of the clock (CLK) that the write command is issued. The remaining data inputs must be
supplied on each subsequent falling and rising edge of Data Strobe until the burst length is completed. When the burst has been
finished, any additional data supplied to the DQ pins will be ignored.
<Burst Length = 4>
0
1
2
3
4
5
6
7
8
CO MM AN D
DQS
DQ 's
NOP
W RITE
NOP
NOP
NOP
NOP
NOP
NOP
t
D Q S S
t
W P S T
D i n 0
D i n 1
D i n 2
D i n 3
t
W P R E S
C L K
C L K
t
D S H
t
D S S
NOP
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M13S2561616A-6TIG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:4M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S256328A 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 32 Bit x 4 Banks Double Data Rate SDRAM
M13S256328A-5BG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 32 Bit x 4 Banks Double Data Rate SDRAM
M13S32321A 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:256K x 32 Bit x 4 Banks Double Data Rate SDRAM
M13S32321A_08 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:256K x 32 Bit x 4 Banks Double Data Rate SDRAM
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