Revision 13 2-35 3.3 V LVCMOS Wide Range Table 2-40 Minimum and Maximum DC Input and Output Levels 3.3" />
參數(shù)資料
型號: M1AGLE3000V5-FG896I
廠商: Microsemi SoC
文件頁數(shù): 111/166頁
文件大?。?/td> 0K
描述: IC FPGA 1KB FLASH 3M 896-FBGA
標(biāo)準(zhǔn)包裝: 27
系列: IGLOOe
邏輯元件/單元數(shù): 75264
RAM 位總計: 516096
輸入/輸出數(shù): 620
門數(shù): 3000000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 896-BGA
供應(yīng)商設(shè)備封裝: 896-FBGA(31x31)
IGLOOe Low Power Flash FPGAs
Revision 13
2-35
3.3 V LVCMOS Wide Range
Table 2-40 Minimum and Maximum DC Input and Output Levels
3.3 V LVCMOS Wide Range
VIL
VIH
VOL
VOH
IOL IOH IOSH
IOSL IIL1 IIH2
Drive
Strength
Equivalent
Software Default
Drive Strength
Option3
Min.
(V)
Max.
(V)
Min.
(V)
Max
(V)
Max.
(V)
Min.
(V)
A A
Max.
(mA)4
Max.
(mA)4 A5 A5
100 A
2 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
25
27
10 10
100 A
4 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
25
27
10 10
100 A
6 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
51
54
10 10
100 A
8 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
51
54
10 10
100 A
12 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
103
109
10 10
100 A
16 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
132
127
10 10
100 A
24 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
268
181
10 10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI . Input current is
larger when operating outside recommended ranges.
3. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
4. Currents are measured at 85°C junction temperature.
5. All LVCMOS 3.3 V software macros supports LVCMOS 3.3 V wide range as specified in the JDEC8a specification.
6. Software default selection highlighted in gray.
Table 2-41 AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
VREF (typ.) (V)
CLOAD (pF)
03.3
1.4
5
Note: *Measuring point = Vtrip. See Table 2-23 on page 2-23 for a complete table of trip points.
相關(guān)PDF資料
PDF描述
AYM40DRMD CONN EDGECARD 80POS .156 WW
AGM40DRMD CONN EDGECARD 80POS .156 WW
M1AGLE3000V5-FGG896I IC FPGA 1KB FLASH 3M 896-FBGA
11AA040T-I/SN IC EEPROM 4KBIT 100KHZ 8SOIC
EP2SGX60CF780C4 IC STRATIX II GX 60K 780-FBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M1AGLE3000V5-FG896PP 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
M1AGLE3000V5-FGG484 功能描述:IC FPGA 1KB FLASH 3M 484-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOOe 標(biāo)準(zhǔn)包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP,帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP(75x75)
M1AGLE3000V5-FGG484I 功能描述:IC FPGA 1KB FLASH 3M 484-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOOe 標(biāo)準(zhǔn)包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP,帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP(75x75)
M1AGLE3000V5-FGG896 功能描述:IC FPGA 1KB FLASH 3M 896-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOOe 標(biāo)準(zhǔn)包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP,帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP(75x75)
M1AGLE3000V5-FGG896ES 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology