參數(shù)資料
型號(hào): M25P32
廠商: 意法半導(dǎo)體
元件分類: DRAM
英文描述: 4 Mbit Uniform Sector, Serial Flash Memory
中文描述: 4兆位統(tǒng)一部門,串行閃存
文件頁(yè)數(shù): 10/48頁(yè)
文件大小: 386K
代理商: M25P32
SPI modes
M25P32
10/48
3
SPI modes
These devices can be driven by a microcontroller with its SPI peripheral running in either of
the two following modes:
CPOL=0, CPHA=0
CPOL=1, CPHA=1
For these two modes, input data is latched in on the rising edge of Serial Clock (C), and
output data is available from the falling edge of Serial Clock (C).
The difference between the two modes, as shown in
Figure 5
, is the clock polarity when the
bus master is in Stand-by mode and not transferring data:
C remains at 0 for (CPOL=0, CPHA=0)
C remains at 1 for (CPOL=1, CPHA=1)
Figure 4.
Bus Master and Memory Devices on the SPI Bus
1.
The Write Protect (W/V
PP
) and Hold (HOLD) signals should be driven, High or Low as appropriate.
Figure 5.
SPI Modes Supported
AI03746E
Bus Master
(ST6, ST7, ST9,
ST10, Others)
SPI Memory
Device
SDO
SDI
SCK
C
Q
D
S
SPI Memory
Device
C
Q
D
S
SPI Memory
Device
C
Q
D
S
CS3
CS2
CS1
SPI Interface with
(CPOL, CPHA) =
(0, 0) or (1, 1)
W/V
PP
HOLD
HOLD
HOLD
W/V
PP
W/V
PP
AI01438B
C
MSB
CPHA
D
0
1
CPOL
0
1
Q
C
MSB
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