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參數(shù)資料
| 型號： | M25PE10-VMP6G |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位統(tǒng)一部門，串行閃存 |
| 文件頁數(shù)： | 42/60頁 |
| 文件大?。?/td> | 310K |
| 代理商： | M25PE10-VMP6G |
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Instructions
M25PE20, M25PE10
42/60
6.16
Deep Power-down (DP)
Executing the Deep Power-down (DP) instruction is the only way to put the device in the
lowest consumption mode (the Deep Power-down mode). It can also be used as an extra
software protection mechanism, while the device is not in active use, since in this mode, the
device ignores all Write, Program and Erase instructions.
Driving Chip Select (S) High deselects the device, and puts the device in Standby Power
mode (if there is no internal cycle currently in progress). But this mode is not the Deep
Power-down mode. The Deep Power-down mode can only be entered by executing the
Deep Power-down (DP) instruction, subsequently reducing the standby current (from I
CC1
to
I
CC2
, as specified in
Table 19
).
Once the device has entered the Deep Power-down mode, all instructions are ignored
except the Release from Deep Power-down (RDP) instruction. This releases the device from
this mode.
The Deep Power-down mode automatically stops at Power-down, and the device always
Powers-up in Standby Power mode.
The Deep Power-down (DP) instruction is entered by driving Chip Select (S) Low, followed
by the instruction code on Serial Data Input (D). Chip Select (S) must be driven Low for the
entire duration of the sequence.
The instruction sequence is shown in
Figure 23
.
Chip Select (S) must be driven High after the eighth bit of the instruction code has been
latched in, otherwise the Deep Power-down (DP) instruction is not executed. As soon as
Chip Select (S) is driven High, it requires a delay of t
DP
before the supply current is reduced
to I
CC2
and the Deep Power-down mode is entered.
Any Deep Power-down (DP) instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
Figure 23.
Deep Power-down (DP) instruction sequence
C
D
AI03753D
S
2
1
3
4
5
6
7
0
t
DP
Deep Power-down Mode
Standby Power Mode
Instruction
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M25PE10-VMP6P | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE10-VMP6TG | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE10-VMP6TP | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE20_07 | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE20-VMN6G | 4 Mbit Uniform Sector, Serial Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M25PE10-VMP6P | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:1 and 2 Mbit, page-erasable serial Flash memories with byte alterability, 75 MHz SPI bus, standard pinout |
| M25PE10-VMP6TG | 功能描述:IC FLASH 1MBIT 75MHZ 8VFQFPN RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:Forté™ 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標(biāo)準(zhǔn)包裝:136 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步，DDR II 存儲容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ |
| M25PE10-VMP6TP | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:1 and 2 Mbit, page-erasable serial Flash memories with byte alterability, 75 MHz SPI bus, standard pinout |
| M25PE16 | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:16-Mbit, page-erasable serial flash memory with byte-alterability, 75 MHz SPI bus, standard pinout |
| M25PE16-VMP6G | 功能描述:閃存 16 Mbit Lo Vltg Page Erasable Seral 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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