參數(shù)資料
型號: M25PE80-VMW6T
廠商: 意法半導(dǎo)體
元件分類: DRAM
英文描述: 4 Mbit Uniform Sector, Serial Flash Memory
中文描述: 4兆位統(tǒng)一部門,串行閃存
文件頁數(shù): 29/43頁
文件大?。?/td> 599K
代理商: M25PE80-VMW6T
29/43
M25PE80
Release from Deep Power-down (RDP)
Once the device has entered the Deep Power-
down mode, all instructions are ignored except the
Release from Deep Power-down (RDP) instruc-
tion. Executing this instruction takes the device out
of the Deep Power-down mode.
The Release from Deep Power-down (RDP) in-
struction is entered by driving Chip Select (S) Low,
followed by the instruction code on Serial Data In-
put (D). Chip Select (S) must be driven Low for the
entire duration of the sequence.
The instruction sequence is shown in
Figure 22.
.
The Release from Deep Power-down (RDP) in-
struction is terminated by driving Chip Select (S)
High. Sending additional clock cycles on Serial
Clock (C), while Chip Select (S) is driven Low,
cause the instruction to be rejected, and not exe-
cuted.
After Chip Select (S) has been driven High, fol-
lowed by a delay, t
RDP
, the device is put in the
Standby mode. Chip Select (S) must remain High
at least until this period is over. The device waits
to be selected, so that it can receive, decode and
execute instructions.
Any Release from Deep Power-down (RDP) in-
struction, while an Erase, Program or Write cycle
is in progress, is rejected without having any ef-
fects on the cycle that is in progress.
Figure 22. Release from Deep Power-down (RDP) Instruction Sequence
C
D
AI06807
S
2
1
3
4
5
6
7
0
t
RDP
Stand-by Mode
Deep Power-down Mode
Q
High Impedance
Instruction
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