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參數(shù)資料
| 型號： | M27V101-100K1TR |
| 廠商： | 意法半導體 |
| 英文描述： | 1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| 中文描述： | 1兆位的128KB × 8低壓紫外線可擦寫可編程只讀存儲器和OTP存儲器 |
| 文件頁數(shù)： | 2/15頁 |
| 文件大?。?/td> | 104K |
| 代理商： | M27V101-100K1TR |
M27V101
2/15
Figure 2B. LCC Pin Connections
Warning:
NC = Not Connected.
AI00661
N
A8
A9
A11
G
A10
E
Q
17
A1
A0
Q0
Q
Q
Q
Q
A7
A6
A5
A4
A3
A2
9
P
1
A
A13
A
Q7
32
V
V
M27V101
A
A14
Q
25
V
Figure 2A. DIP Pin Connections
Warning:
NC = Not Connected.
A1
A0
Q0
Q1
Q2
VSS
A7
A6
A5
A4
A3
A2
A13
A8
A9
A11
G
A10
E
Q7
Q6
A14
Q5
Q4
Q3
NC
P
A16
A15
A12
VPP
VCC
AI01906
M27V101
8
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A new pattern can then be written to the device by
following the programming procedure. For appli-
cations wherethe content isprogrammed only one
time and erasure is not required, the M27V101 is
offered in both PDIP32, PLCC32 and TSOP32 (8
x 20 mm) packages.
DEVICE OPERATION
The operating modes of the M27V101 are listed in
the Operating Modes table. A single power supply
is required in the read mode. All inputs are TTL
levels except for VPPand 12V onA9 forElectronic
Signature.
Read Mode
The M27V101 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
dresses are stable, the address access time
(t
AVQV
) is equal to the delay from E to output
(t
ELQV
). Datais available atthe output aftera delay
of t
GLQV
from the falling edge of G, assuming that
E has been low and the addresses have been sta-
ble for at least t
AVQV
-t
GLQV
.
Figure 2C. TSOP Pin Connections
Warning:
NC = Not Connected.
A1
A2
A0
Q0
A7
A6
A5
A4
A3
A13
A14
NC
A10
E
A8
A9
Q7
Q6
A11
G
Q5
Q4
Q1
Q2
Q3
VSS
P
A16
A15
A12
VPP
VCC
AI01152B
M27V101
(Normal)
8
9
1
16
17
24
25
32
相關PDF資料 |
PDF描述 |
|---|---|
| M27V101-100K6TR | 1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| M27V101-100N1TR | 1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| M27V101-100N6TR | 1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| M27V101-120B1TR | 1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| M27V101-150B1TR | 1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M27V101-100K6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| M27V101-100N1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| M27V101-100N6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| M27V101-120B1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| M27V101-120B6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
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