參數(shù)資料
型號： M30600E8-XXXGP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù)： 76/139頁
文件大?。?/td> 1782K
代理商： M30600E8-XXXGP
Mitsubishi microcomputers
M16C / 60 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
41
Figure 1.26. Configuration of interrupt control register
Symbol
Address
When reset
INTiIC(i=0 to 2)
005D 16 to 005F16
XX00X000 2
Bit name
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
ILVL0
IR
POL
Nothing is assigned.
These bits can neither be set nor reset. When read, their contents are
indeterminate.
Interrupt priority level
select bit
Interrupt request bit
Polarity select bit
Reserved bit
0: Interrupt not requested
1: Interrupt requested
0 : Selects falling ede
1 : Selects rising edge
Always set to “0”
ILVL1
ILVL2
Note: This bit can only be accessed for reset (= 0), but cannot be accesd
for set (= 1).
(Note)
Interrupt control register
b7
b6
b5
b4
b3
b2
b1
b0
Bit name
Function
Bit symbol
W
R
Symbol
Address
When reset
DMiIC(i=0,1)
004B 16, 004C16
XXXXX000 2
KUPIC
004D 16
XXXXX000 2
ADIC
004E 16
XXXXX000 2
SiTIC(i=0,1)
0051 16,005316
XXXXX000 2
SiRIC(i=0,1)
0052 16,005416
XXXXX000 2
TAiIC(i=0 to 4)
0055 16 to 005916
XXXXX000 2
TBiIC(i=0 to 2)
005A 16 to 005C16
XXXXX000 2
ILVL0
IR
Interrupt priority level
select bit
Interrupt request bit
0 : Interrupt not requested
1 : Interrupt requested
ILVL1
ILVL2
Nothing is assigned.
These bits can neither be set nor reset. When read, their contents are
indeterminate.
(Note)
Note: This bit can only be accessed for reset (= 0), but cannot be accesd
for set (= 1).
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
b2b1b0
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
b2 b1 b0
0
Interrupts
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