- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45019 > M30624MGM-XXXGP 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100 PDF資料下載
參數(shù)資料
| 型號： | M30624MGM-XXXGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 8/30頁 |
| 文件大?。?/td> | 379K |
| 代理商： | M30624MGM-XXXGP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當(dāng)前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁
Timing
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
Switching characteristics (referenced to VCC = 3V, VSS = 0V at Topr = – 20oC to 85oC / – 40oC to
85oC (Note 3), CM15 = “1” unless otherwise specified)
Table 1.26.22. Memory expansion and microprocessor modes
(when accessing external memory area with wait)
Note 3: Specify a product of –40°C to 85°C to use it.
td(BCLK-AD)
Address output delay time
60
ns
td(BCLK-CS)
Chip select output delay time
60
ns
th(BCLK-AD)
Address output hold time (BCLK standard)
4
ns
th(BCLK-CS)
Chip select output hold time (BCLK standard)
4
ns
td(BCLK-ALE)
ALE signal output delay time
60
ns
th(BCLK-ALE)
ALE signal output hold time
– 4
ns
td(BCLK-RD)
RD signal output delay time
60
ns
th(BCLK-RD)
RD signal output hold time
0
ns
th(RD-AD)
Address output hold time (RD standard)
0
ns
td(BCLK-WR)
WR signal output delay time
60
ns
th(BCLK-WR)
WR signal output hold time
0
ns
th(WR-AD)
Address output hold time (WR standard)
0
ns
td(BCLK-DB)
Data output delay time (BCLK standard)
80
ns
th(BCLK-DB)
Data output hold time (BCLK standard)
4
ns
td(DB-WR)
Data output delay time (WR standard)
(Note1)
ns
th(WR-DB)
Data output hold time (WR standard)(Note2)
0
ns
Note 1: Calculated according to the BCLK frequency as follows:
td(DB – WR) =
f(BCLK)
10
9
– 80
[ns]
Symbol
Standard
Measuring condition
Max.
Min.
Parameter
Unit
Note 2: This is standard value shows the timing when the output is off,
and doesn't show hold time of data bus.
Hold time of data bus is different by capacitor volume and pull-up
(pull-down) resistance value.
Hold time of data bus is expressed in
t = –CR X ln (1 – VOL / VCC)
by a circuit of the right figure.
For example, when VOL = 0.2VCC, C = 30pF, R = 1k
, hold time
of output “L” level is
t = – 30pF X 1k
X ln (1 – 0.2VCC / VCC)
= 6.7ns.
DBi
R
C
Figure 1.31.1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M30624FGMFP | 16-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP100 |
| M30624MGM-XXXGP | 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100 |
| M30624FGAGP#U3 | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100 |
| M30620FCMGP | 16-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP100 |
| M30620FCAFP | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M30624MGN-XXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30624MGN-XXXGP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30624MGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30624MGP-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30624MGP-XXXGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。