Contents for change
Revision
date
Version
Under
development
Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi Microcomputers
M16C/80 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
329
Revision history
Page 113 Notes 2, 3 --> addition
Page 114 three-phase waveform mode --> three phase PWM output mode
Page 128 Figure 1.16.5 UARTi bit rate generator --> Note 2 addition
Page 128 Figure 1.16.5 UARTi transmit buffer register, UARTi bit rate generator-->Note 1
addition
Page 129 Figure 1.16.6 UARTi transmit/receive mode register-->Note 2 addition in CKDIR of
UART mode
Page 133 Figure 1.16.10 UART transmit/receive control register 2-->Note delete
Page 136 Note 2, Page 143 Note 3 ... the UARTi receive interrupt request bit is not set to "1"
--> ... the UARTi receive interrupt request bit will not change
Page 145 Figure 1.18.1 UARTi transmit/receive mode register (i=0,1) --> Note 1 addition,
UARTi transmit/receive mode register (i=2 to 4) --> Note 2 addition
Page 157 On the 12th line, ... allocated to bit 3 in UART2 transmission buffer register 1
(address 033F16) ... --> ... allocated to bit 11 in UART2 transmission buffer register
(address 033E16) ...
Page 161 < Master Mode (TxDi and RxDi are selected, DINC = 0) >
..., and the STxDi, SRxDi and CLKi pins ...--> ..., and the TxDi, RxDi and CLKi
pins ...
Page 165 Table 1.21.1 Absolute precision --> change
Page 170 Table 1.21.3 Reading of result of A-D converter --> (at any time) addition
Page 173 Table 1.21.6 Input pin --> change to AN0 to AN7, With emphasis on the pin -->
addition
Page 182 On the second line from the bottom, ..., and dummy cycle for refresh ... --> ..., and
processing necessary for dummy cycle to refresh DRAM ...
Page 189 On the 18th and 27th lines, page 194 Port Pi direction register Note 2, page 196
Port Pi register Note 1 ... for setting of bus control such as address bus and data bus is
_____
_______
_____
_________
... --> of pins A0 to A22, A23, D0 to D15, MA0 to MA12, CS0 to CS 3, WRL/WR/CASL,
_______
_____
_________
_______
WRH/BHE/CASH, RD/DW, BCLK/ALE/CLKOUT, HLDA/ALE, HOLD, ALE/RAS, and
_______
RDY are ...
Page 207 Timer A (event counter mode) --> (3) addition, Timer A (one-shot timer mode) -->
(2) changes to (3), (2) and (4) addition
Page 209 Timer B (pulse period/pulse width measurement mode) --> (3) addition
________
Page 212 to 214 (2) NMI interrupt The NMI pin also serves as P85, ... Signal of "L" level ...
--> addition
(3) Address match interrupt
From " To rewrite the interrupt control..." to
"; Interrupt completed" on page 77 --> addition
(4) External interrupt, (5) Rewrite the interrupt control register --> addition
__________
Page 215 HOLD signal --> addition
Page 216 DRAM controller --> addition
Page 217 Setting the registers, Notes on the microprocessor mode ... single-chip mode
-->addition
Page 219 Note 2 80mA --> –80mA
Page 220 Table 1.28.3 Ta --> Topr, Note2 --> addition
Pages 220, 243 Tables 1.28.3, 1.28.23 Icc Power supply current ROMless version --> addi-
tion, Ta --> Topr, Note 2 --> addition
Page 243 Table 1.28.23 Topr=25
°C, when clock is stopped: 2.0A --> 1.0A, Notes 1, 2 -->
addition
Page 250 Table 1.28.41 th(BCLK-RD) Min. 0 ns --> –3 ns