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參數(shù)資料
| 型號： | M34552G8FP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP48 |
| 封裝： | 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48 |
| 文件頁數(shù)： | 52/143頁 |
| 文件大小： | 0K |
| 代理商： | M34552G8FP |
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2: INITIALIZATION
S1D13505 PROGRAMMING NOTES
EPSON
2-3
AND EXAMPLES (X23A-G-003-05)
Table 2-1 S1D13505 Initialization Sequence
Register
Value
Notes
See Also
[1B]
0000 0000
Enable the host interface
[23]
1000 0000
Disable the FIFO
[01]
0011 0000
Memory conguration
- divide ClkI by 512 to get 4 ms for 256 refresh cycles
- this is 2-CAS# EDO memory
[22]
0100 1000
Performance Enhancement 0 - refer to the hardware specication for a
complete description of these bits
S1D13505 Hardware Func-
tional Specication
[02]
0001 0110
Panel type - non-EL, 8-bit data, format 1, color, dual, passive
[03]
0000 0000
Mod rate used by older monochrome panels - set to 0
[04]
0100 1111
Horizontal display size = (REG[04]+1)*8 = (79+1)*8 = 640 pixels
see note for REG[16h] and
REG[17h]
[05]
0000 0011
Horizontal non-display size = (REG[05]+1)*8 = (3+1)*8 = 32 pixels
[06]
0000 0000
FPLINE start position - only required for CRT or TFT/D-TFD
[07]
0000 0000
FPLINE polarity set to active high
[08]
1110 1111
Vertical display size = REG[09][08] + 1
= 0000 0000 1110 1111 + 1
= 239+1 = 240 lines (total height/2 for dual panels)
[09]
0000 0000
[0A]
0011 1000
Vertical non-display size = REG[0A] + 1 = 57 + 1 = 58 lines
[0B]
0000 0000
FPFRAME start position - only required for CRT or TFT/D-TFD
[0C]
0000 0000
FPFRAME polarity set to active high
[0D]
0000 1100
Display mode - SwivelViewTM disabled, 8 bpp and LCD disabled,
enable LCD in last step of this example.
[0E]
1111 1111
Line compare (REG[0Eh] and REG[0Fh] set to maximum allowable
value. We can change this later if we want a split screen.
[0F]
0000 0011
[10]
0000 0000
Screen 1 Start Address (REG[10h], REG[11h], and REG[12h]) set to 0.
This will start the display in the rst byte of the display buffer.
[11]
0000 0000
[12]
0000 0000
[13]
0000 0000
Screen 2 Start Address (REG[13h], REG[14h], and REG[15h]) to offset
0. Screen 2 Start Address in not used at this time.
[14]
0000 0000
[15]
0000 0000
[16]
0100 0000
Memory Address Offset (REG[17h], REG[16h])
- 640 pixels = 640 bytes = 320 words = 140h words
Note: When setting a horizontal resolution greater than 767 pixels, with
a color depth of 15/16 bpp, the Memory Offset Registers (REG[16h],
REG[17h]) must be set to a virtual horizontal pixel resolution of 1024.
[17]
0000 0001
[18]
0000 0000
Set pixel panning for both screens to 0
[19]
0000 0001
Clock Conguration - set PClk to MClk/2 - the specication says that
for a dual color panel the maximum PClk is MClk/2
[1A]
0000 0000
Enable LCD Power
[1C]
0000 0000
MD Conguration Readback - we write a 0 here to keep the register
conguration logic simpler
[1D]
0000 0000
[1E]
0000 0000
General I/O Pins - set to zero.
[1F]
0000 0000
[20]
0000 0000
General I/O Pins Control - set to zero.
[21]
0000 0000
[24]
0000 0000
The remaining register control operation of the LUT and hardware cur-
sor/ink layer. During the chip initialization none of these registers needs
to be set. It is safe to write them to zero as this is the power-up value for
the registers.
[26]
0000 0000
[27]
0000 0000
[28]
0000 0000
[29]
0000 0000
[2A]
0000 0000
[2B]
0000 0000
[2C]
0000 0000
[2D]
0000 0000
[2E]
0000 0000
[2F]
0000 0000
[30]
0000 0000
[31]
0000 0000
[23]
0000 0000
Enable FIFO, mask in appropriate FIFO threshold bits
S1D13505 Hardware Func-
tional Specication
[0D]
0000 1101
Display mode - SwivelViewTM disabled, 8 bpp and LCD enabled
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M34552M8H-XXXFP | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP48 |
| M34552G8HFP | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP48 |
| M34556G8HFP | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO42 |
| M34556M8-XXXFP | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO42 |
| M34556M8H-XXXFP | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO42 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M34552G8HFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34552M4H-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34552M4-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34552M8H-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34552M8-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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