參數(shù)資料
型號(hào): M37274EFSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, MICROCONTROLLER, PDIP52
封裝: 0.600 INCH, 1.78 MM PITCH, SHRINK, PLASTIC, DIP-52
文件頁(yè)數(shù): 104/147頁(yè)
文件大小: 2042K
代理商: M37274EFSP
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6
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37274EFSP
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
paramentic
limits
are
subject
to change.
MITSUBISHI MICROCOMPUTERS
VCC,
AVCC,
VSS
CNVSS
_____
RESET
XIN
XOUT
P00/PWM4–
P02/PWM6,
P03/DA,
P04/PWM0–
P07/PWM3
P10/OUT2,
P11/SCL1,
P12/SCL2,
P13/SDA1,
P14/SDA2,
P15,
P16/INT3,
P17/SIN
P20–P23
P24/AD3–
P26/AD1,
P27/AD5
P30, P31
P40/AD4,
P41/INT2,
P42/TIM2,
P43/TIM3,
P44/INT1,
P45/SOUT,
P46/SCLK
P52/R,P53/G,
P54/B,
P55/OUT1
Power source
CNVSS
Reset input
Clock input
Clock output
I/O port P0
8-bit PWM output
I/O port P1
OSD output
Multi-master
I2C-BUS interface
Serial I/O data
input
I/O port P2
Analog input
I/O port P3
Input port P4
Analog input
External interrupt
input
External clock input
Serial I/O data
output
Serial I/O
synchronous clock
input/output
Output port P5
OSD output
Input
Output
I/O
Output
I/O
Output
Input
I/O
Input
I/O
Input
Output
I/O
Output
Apply voltage of 5 V ± 10 % (typical) to VCC and AVCC, and 0 V to VSS.
Connected to VSS.
To enter the reset state, the reset input pin must be kept at a “L” for 2
s or more (under
normal VCC conditions).
If more time is needed for the quartz-crystal oscillator to stabilize, this “L” condition should
be maintained for the required time.
This chip has an internal clock generating circuit. To control generating frequency, an
external ceramic resonator or a quartz-crystal oscillator is connected between pins XIN and
XOUT. If an external clock is used, the clock source should be connected to the XIN pin and
the XOUT pin should be left open.
Port P0 is an 8-bit I/O port with direction register allowing each I/O bit to be individually
programmed as input or output. At reset, this port is set to input mode. The output structure
of P03 is CMOS output, that of P00–P02 and P04–P07 are N-channel open-drain output.
See notes at end of Table for full details of port P0 functions.
Pin P03 is also used as 14-bit PWM output pin DA. The output structure is CMOS output.
Pins P00–P02 and P04–P07 are also used as PWM output pins PWM4–PWM6 and PWM0–
PWM3 respectively. The output structure is N-channel open-drain output.
Port P1 is an 8-bit I/O port and has basically the same functions as port P0. The output
structure of P10 and P15–P17 is CMOS output, that of P11–P14 is N-channel open-drain
output.
Pin P10 is also used as OSD output pin OUT2. The output structure is CMOS output.
Pin P11 is used as SCL1, SCL2, SDA1 and SDA2 respectively, when multi-master I2C-
BUS interface is used. The output structure is N-channel open-drain output.
Pin P17 is also used as serial I/O data input pin SIN.
Port P2 is an 8-bit I/O port and has basically the same functions as port P0. The output
structure is CMOS output.
Pins P24–P26, P27 are also used as analog input pins AD3–AD1, AD5 respectively.
Ports P30 and P31 are 2-bit I/O ports and have basically the same functions as port P0.
The output structure is CMOS output.
Ports P40–P46 are a 7-bit input port.
Pin P40 is also used as analog input pin AD4.
Pins P41, P44 are also used as external interrupt input pins INT2, INT1.
Pins P42 and P43 are also used as external clock input pins TIM2, TIM3 respectively.
Pin P45 is used as serial I/O data output pin SOUT. The output structure is N-channel open-
drain output.
Pin P46 is used as serial I/O synchronous clock input/output pin SCLK. The output structure
is N-channel open-drain output.
Ports P52–P55 are 4-bit output ports. The output structure is CMOS output.
Pins P52–P55 are also used as OSD output pins R, G, B, OUT1 respectively.
PIN DESCRIPTION
Pin
Name
Functions
Input/
Output
DA output
External interrupt
input
Output
Input
Pin P16 is also used as external interrupt input pin INT3.
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