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參數(shù)資料
| 型號： | M37274EFSP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, MICROCONTROLLER, PDIP52 |
| 封裝： | 0.600 INCH, 1.78 MM PITCH, SHRINK, PLASTIC, DIP-52 |
| 文件頁數(shù)： | 98/147頁 |
| 文件大?。?/td> | 2042K |
| 代理商： | M37274EFSP |
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54
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37274EFSP
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
paramentic
limits
are
subject
to change.
(2) I2C Address Register
The I2C address register (address 00F716) consists of a 7-bit slave
___
address and a read/write bit. In the addressing mode, the slave ad-
dress written in this register is compared with the address data to be
received immediately after the START condition are detected.
____
s Bit 0: Read/Write Bit (RBW)
Not used when comparing addresses, in the 7-bit addressing mode.
In the 10-bit addressing mode, the first address data to be received
is compared with the contents (SAD6 to SAD0 + RBW) of the I2C
address register.
The RBW bit is cleared to “0” automatically when the stop condition
is detected.
s Bits 1 to 7: Slave Address (SAD0–SAD6)
These bits store slave addresses. Regardless of the 7-bit address-
ing mode and the 10-bit addressing mode, the address data trans-
mitted from the master is compared with the contents of these bits.
Fig. 52. I2C Address Register
b7 b6 b5 b4 b3 b2 b1 b0
0
Read/write bit
(RBW)
1
to
7
Slave address
(SAD0 to SAD6)
0: Read
1: Write
0
The address data transmitted from
the master is compared with the
contents of these bits.
I2C Address Register
I2C address register (S0D) [Address 00F716]
B
Name
Functions
After reset RW
R—
RW
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