參數(shù)資料
型號： M37281EKSP
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述： 單芯片8位CMOS微機(jī)隱蔽字幕解碼器和屏幕顯示控制器
文件頁數(shù)： 54/172頁
文件大小： 1319K
代理商： M37281EKSP
M37281MAH–XXXSP,M37281MFH–XXXSP,M37281MKH–XXXSP, M37281EKSP
Rev.1.01 2003.07.16 page 54 of 170
Fig. 8.9.2 ROM Correction Enable Register
Fig. 8.9.1 ROM Correction Address Registers
8.9 ROM CORRECTION FUNCTION
This can correct program data in ROM. Up to 2 addresses can be
corrected, a program for correction is stored in the ROM correction
vector in RAM as the top address. The ROM correction vectors are 2
vectors.
Vector 1 : address 02C0
16
Vector 2 : address 02E0
16
Set the address of the ROM data to be corrected into the ROM cor-
rection address register. When the value of the counter matches the
ROM data address in the ROM correction vector as the top address,
the main program branches to the correction program stored in the
ROM memory for correction. To return from the correction program
to the main program, the op code and operand of the JMP instruction
(total of 3 bytes) are necessary at the end of the correction program.
The ROM correction function is controlled by the ROM correction
enable register.
Notes 1:
Specify the first address (op code address) of each instruction as the
ROM correction address.
2:
Use the JMP instruction (total of 3 bytes) to return from the correction
program to the main program.
3:
Do not set the same ROM correction address to vectors 1 and 2.
4:
For the M37281MKH-XXXSP and M37281EKSP, when using the ex-
pansion ROM (BK7 = “1”), the ROM correction function do not oper-
ate used for addresses 1000
16
to1FFF
16
. Note that on programming.
020C
16
ROM correction address 1 (high-order)
020D
16
ROM correction address 1 (low-order)
020E
16
ROM correction address 2 (high-order)
020F
16
ROM correction address 2 (low-order)
b7 b6 b5 b4 b3 b2 b1 b0
ROM correction enable register (RCR) [Address 0210
16
]
B
After reset
R W
ROM Correction Enable Register
0
Vector 1 enable bit (RCR0)
Name
Functions
0: Disabled
1: Enabled
1
Vector 2 enable bit (RCR1)
0: Disabled
1: Enabled
4
to
7
Nothing is assigned. These bits are write disable bits. When
these bits are read out, the values are
“
0.
”
0
0
0
R W
R W
R
—
0
0
2, 3 Fix these bits to
“
0.
”
0
R W
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