參數(shù)資料
型號(hào)： M37281EKSP
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述： 單芯片8位CMOS微機(jī)隱蔽字幕解碼器和屏幕顯示控制器
文件頁數(shù)： 64/172頁
文件大?。?/td> 1319K
代理商： M37281EKSP
M37281MAH
–
XXXSP,M37281MFH
–
XXXSP,M37281MKH
–
XXXSP, M37281EKSP
Rev.1.01 2003.07.16 page 64 of 170
8.10.11 16-bit Shift Register
The caption data converted into a digital value by the comparator is
stored into the 16-bit shift register in synchronization with the data
clock. The contents of the high-order 8 bits of the stored caption
data can be obtained by reading out data register 2 (address 00E3
16
)
and data register 4 (address 00E5
16
). The contents of the low-order
8 bits can be obtained by reading out data register 1 (address 00E2
16
)
and data register 3 (address 00E4
16
), respectively. These registers
are reset to
“
0
”
at a falling of V
sep
. Read out data registers 1 and 2
after the occurrence of a data slicer interrupt (refer to
“
8.10.12 Inter-
rupt Request Generating Circuit
”
).
8.10.12 Interrupt Request Generating Circuit
The interrupt requests as shown in Table 8.10.3 are generated by
combination of the following bits; bits 6 and 7 of the caption position
register (address 00E6
16
). Read out the contents of data registers 1
to 4 and the contents of bits 3 to 7 of the clock run-in detect register
after the occurrence of a data slicer interrupt request.
Slice Line Specification Mode
CPS
bit 7
Completion Flag 1
(bit 0 of DSC2)
Completion Flag 2
(bit 5 of CPS)
A line specified by
bits 4 to 0 of CPS
Caption Data
Registers 1, 2
16-bit data of line 21
Caption Data
Registers 3, 4
16-bit data of a line specified by
bits 4 to 0 of CPS
Line 21
A line specified by
bits 4 to 0 of CPS
Line 21
Line 21
Invalid
Invalid
A line specified by
bits 4 to 0 of CPS
16-bit data of a line specified
by bits 4 to 0 of CPS
16-bit data of line 21
16-bit data of line 21
Invalid
Invalid
16-bit data of a line specified by
bits 4 to 0 of CPS
Contents of Caption Data Latch Completion Flag
Contents of 16-bit Shift Register
0
0
1
1
bit 6
0
1
0
1
CPS: Caption position register
DSC2: Data slicer control register 2
Table 8.10.2 Contents of Caption Data Latch Completion Flag and 16-bit Shift Register
Caption position register
b7
Occurence Souces of Interrupt Request at End of Data Slice Line
After slicing line 21
After a line specified by bits 4 to 0 of CPS
After slicing line 21
After slicing line 21
0
1
b6
0
1
0
1
Table 8.10.3 Occurence Sources of Interrupt Request
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M37281MKH-XXXSP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
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