參數(shù)資料
型號(hào)： M37512F8HP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PQFP48
封裝： 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁(yè)數(shù)： 45/89頁(yè)
文件大小： 877K
代理商： M37512F8HP
Feb 18, 2005
page 3 of 85
REJ03B0122-0101
7512 Group
PIN DESCRIPTION
Functions
Name
Pin
Apply voltage of 2.5V to Vcc, and 0 V to Vss.
Apply voltage of 2.5V to AVcc, and 0 V to AVss, ADVss.
Reference voltage input pin for A/D converters.
This pin controls the operation mode of the chip.
Normally connected to VSS.
Reset input pin for active “L”.
Input and output pins for the clock generating circuit.
Connect a ceramic resonator or quartz-crystal oscillator between the XIN and XOUT pins to set
the oscillation frequency.
When a high-speed RC oscillator is used, leave the XIN pin and XOUT pin open.
When an external clock is used, connect the clock source to the XIN pin and leave the XOUT
pin open.
8-bit CMOS I/O port.
I/O direction register allows each pin to be individually
programmed as either input or output.
CMOS compatible input level.
P00 to P07 are CMOS 3-state output structure,
and P10 to P17 are N-channel open-drain structure.
P10 to P17 (8 bits) are enabled to output large current
for LED drive.
Power source
Table 1 Pin description
Function except a port function
Analog power
source
Analog reference
voltage
CNVSS input
Reset input
Clock input
Clock output
Serial I/O2 function pin
I/O port P0
A/D converter input pin /
PWM output pin
Current integrator and over current detector input pins.
Connect the sense resistor. Normally connect the ISENS0 to GND.
A/D converter input pin
A/D converter input pin /
Over current detector function pin
Sub-clock generating circuit I/O
pins (connect a resonat or registor
and capacitor)
8-bit CMOS I/O port.
I/O direction register allows each pin to be individually
programmed as either input or output.
CMOS compatible input level, but P22 to P25 can be
switched between CMOS compatible input level or
SMBUS input level in the I2C-BUS interface function.
P20, P21, P26, P27: CMOS3-state output structure.
P22 to P25: N-channel open-drain structure.
6-bit CMOS I/O port with the same function as port P0.
CMOS compatible input level.
CMOS 3-state output structure.
6-bit CMOS I/O port with the same function as port P0.
CMOS compatible input level.
P40 to P42, P45 are CMOS 3-state output structure,
and P43 and P44 are N-channel open-drain structure.
I/O port P1
I/O port P2
I/O port P3
I/O port P4
Analog input pin
VCC, VSS
AVCC
AVSS
ADVSS
ADVREF
CNVSS
RESET
XIN
XOUT
P00/SIN2
P01/SOUT2
P02/SCLK2
P03/SRDY2
P04/AN8
P05/AN9
P06/CFETCNT/
AN10
P07/AN11/
PWM1
P10–P17
P20/XCOUT
P21/XCIN
P22/SDA1
P23/SCL1
P24/SDA2/RxD
P25/SCL2/TxD
P26/SCLK
P27/CNTR0/
SRDY1
P30/AN0–
P35/AN5
P40/CNTR1
P41/INT0
P42/INT1
P43/INT2/SCMP2
P44/INT3/PWM0
P45/DFETCNT
ISENS0
ISENS1
I2C-BUS interface function pins/
Serial I/O1 function pins
Serial I/O1 function pin
Serial I/O1 function pin/
Timer X function pin
I2C-BUS interface function pins
A/D converter input pin
Timer Y function pin
Interrupt input pins
Interrupt input pin/SCMP2 output pin
Interrupt input pin/PWM output pin
Over current detector function pin
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