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參數(shù)資料
| 型號(hào)： | M37641F8FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁數(shù)： | 117/149頁 |
| 文件大?。?/td> | 1997K |
| 代理商： | M37641F8FP |
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117
7641 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
Bus Operation Modes
G
Read
The Read mode is entered by pulling the OE pin low when the CE
pin is low and the WE and RP pins are high. There are two read
modes: array and status register, which are selected by software
command input. In read mode, the data corresponding to each
software command entered is output from the data I/O pins DB
0
–
DB
7
. The read array mode is automatically selected when the
MCU is powered on or after releasing deep power down mode.
G
Output Disable
The output disable mode is entered by pulling the CE pin low and
the WE, OE, and RP pins high. Also, the data I/O pins are placed
in the high-impedance state.
G
Standby
RP pin is high. Also, the data I/O pins are placed in the high-im-
pedance state. However, if the CE pin is set high during erase or
program operation, the internal control circuit does not halt imme-
diately and normal power consumption is required until the
operation under way is completed.
_____
G
Write
The write mode is entered by pulling the WE pin low when the CE
pin is low and the OE and RP pins are high. In this mode, the
MCU accepts the software commands or write data entered from
the data I/O pins. A program, erase, or some other operation is ini-
tiated depending on the contents of the software command
entered here. The input data such as address and software com-
mand is latched at the rising edge of WE or CE whichever occurs
earlier.
G
Deep Power Down
The deep power down mode is entered by pulling the RP pin low.
Also, the data I/O pins are placed in the high-impedance state.
When the MCU is freed from deep power down mode, the read ar-
ray mode is selected and the contents of the status register is set
to
“
80
16
”
. If the RP pin is pulled low during erase or program op-
eration, the operation under way is canceled and the data in the
relevant block becomes invalid.
Software Commands
Table 30 lists the software commands. By inputting a software
command from the data I/O pins (DB
0
–
DB
7
) in write mode, specify
the contents of the operation, such as erase or program operation,
to be performed.
The following explains the contents of each software command.
G
Read Array Command (FF
16
)
The read array mode is entered by writing the command code
“
FF
16
”
in the first bus cycle. When an address to be read is input
in one of the bus cycles that follow, the contents of the specified
address are output from the data I/O pins (DB
0
–
DB
7
).
The read array mode is retained intact until another command is
written.
The read array mode is also selected automatically when the MCU
is powered on and after releasing deep power down mode.
G
Read Status Register Command (70
16
)
When the command code
“
70
16
”
is written in the first bus cycle,
the contents of the status register are output from the data I/O
pins (DB
0
–
DB
7
) by a read in the second bus cycle. Since the con-
CE, the OE or CE signal must be input each time the status is
read. The status register is explained in the next section.
G
Clear Status Register Command (50
16
)
This command is used to clear the bits SR4, SR5 of the status
register after they have been set. These bits indicate that opera-
tion has ended in an error. To use this command, write the
command code
“
50
16
”
in the first bus cycle.
G
Program Command (40
16
)
The program mode is entered when the command code
“
40
16
”
is
written in the first bus cycle. Then, if the address and data to pro-
gram are written in the second bus cycle, program operation (data
programming and verification) will start.
Whether the write operation is completed can be confirmed by
reading the status register or the RY/BY signal status. When the
program starts, the read status register mode is entered automati-
cally and the contents of the status register can be read out from
the data I/O pins (DB
0
to D
7B
). The status register bit 7 (SR7) is
set to
“
0
”
at the same time the write operation starts and is re-
turned to
“
1
”
upon completion of the write operation. In this case,
the read status register mode remains active until the next com-
mand is written.2
The RY/BY pin is
“
L
”
during write operation and
“
H
”
when the write
operation is completed as is the status register bit 7 (SR7).
At program end, program results can be checked by reading the
status register.
Figure 99 shows the byte program flowchart.
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