76
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Fig. 88 Chip select area register bit configuration
Chip select area register
Address
6316
Chip select area switch bits (Notes 1, 2)
000 : CS0 00100016 to 02FFFF16 (188 Kbytes)
CS1 03000016 to 04FFFF16 (128 Kbytes)
CS2 05000016 to 06FFFF16 (128 Kbytes)
CS3 00088016 to 000DFF16 (1408 bytes)
CS4 000E0016 to 000FFF16 (512 bytes)
001 : CS0 00800016 to 02FFFF16 (160 Kbytes)
CS1 03000016 to 04FFFF16 (128 Kbytes)
CS2 05000016 to 06FFFF16 (128 Kbytes)
CS3 00088016 to 000FFF16 (1920 bytes)
CS4 00100016 to 007FFF16 (28 Kbytes)
010 : CS0 00100016 to 02FFFF16 (188 Kbytes)
CS1 03000016 to 04FFFF16 (128 Kbytes)
CS2 05000016 to 06FFFF16 (128 Kbytes)
CS3 07000016 to 077FFF16 (32 Kbytes)
CS4 07800016 to 07FFFF16 (32 Kbytes)
011 : CS0 00800016 to 02FFFF16 (160 Kbytes)
CS1 03000016 to 04FFFF16 (128 Kbytes)
CS2 05000016 to 06FFFF16 (128 Kbytes)
CS3 07000016 to 077FFF16 (32 Kbytes)
CS4 07800016 to 07FFFF16 (32 Kbytes)
100 : CS0 00088016 to 02FFFF16 (190 Kbytes)
CS1 03000016 to 04FFFF16 (128 Kbytes)
CS2 05000016 to 06FFFF16 (128 Kbytes)
CS3 08000016 to 3FFFFF16 (3.5 Mbytes)
CS4 07000016 to 07FFFF16 (64 Kbytes)
101 : CS0 00088016 to 02FFFF16 (190 Kbytes)
CS1 03000016 to 04FFFF16 (128 Kbytes)
CS2 05000016 to 06FFFF16 (128 Kbytes)
CS3 07000016 to 07FFFF16 (64 Kbytes)
CS4 08000016 to 7FFFFF16 (7.5 Mbytes)
110 : CS0 00088016 to 06FFFF16 (446 Kbytes)
CS1 ,CS2
Not available
CS3 08000016 to 3FFFFF16 (3.5 Mbytes)
CS4 07000016 to 07FFFF16 (64 Kbytes)
111 : CS0 00088016 to 06FFFF16 (446 Kbytes)
CS1 ,CS2
Not available
CS3 07000016 to 07FFFF16 (64 Kbytes)
CS4 08000016 to 7FFFFF16 (7.5 Mbytes)
Expansion address output select bits (Notes 1, 3)
0 0 : P91.... CS1 output, P92...CS2 output, P93...CS3 output
0 1 : P91.... A20 output, P92...CS2 output, P93...CS3 output
1 0 : P91.... A20 output, P92...A21 output, P93...CS3 output
1 1 : P91.... A20 output, P92...A21 output, P93...A22 output
76
5
4
3
2
1
0
Multiplex bus select bit (Note 1)
0 : D0 to D7 input/output (separate bus)
1 : When BYTE pin input is “H” and accessing CS4 area
LA0/D0 to LA7/D7 input/output (multiplex bus)
In condition except above
D0 to D7 input/output (separate bus)
Notes 1 : When the expansion function select bit (bit 5 of particular function select register 1; Figure 62) is “1”,
bits 2, 5, 6 and 7 can be written and changed.
2 : When accessing the internal memory area, CSi is not output. When only accessing the external area, CSi output is valid.
3 : Select function of bits 6 and 7 is valid when both the CS1, CS2 function select bit and the CS3 function select bit (chip
select control register) are “1”.