7902 Group User’s Manual
APPENDIX
21-30
Appendix 2. Control registers
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Note: At power-on reset, these bits become “0”; at hardware reset or software reset, these bits retain the value immediately before reset.
Bit name
Bit
Debug control register 0 (Address 6616)
Function
Detect condition select bits
Fix these bits to “0.”
Detect enable bit
Fix this bit to “0.”
The value is “1” at reading.
RW
—
b7 b6 b5 b4 b3 b2 b1 b0
0 0 0 : Do not select.
0 0 1 : Address matching detection 0
0 1 0 : Address matching detection 1
0 1 1 : Address matching detection 2
1 0 0 : Do not select.
1 0 1 : Out-of-address-area detection
1 1 0 :
1 1 1 :
b2 b1 b0
0 : Detection disabled.
1 : Detection enabled.
(Note)
1
Do not select.
00 0
At reset
R/W
(Note 1)
0
(Note 1)
0
RW
RO
RW
RO
—
Bit name
Bit
Debug control register 1 (Address 6716)
Function
At reset
R/W
Fix this bit to “0.”
The value is “0” at reading.
Address compare register
access enable bit (Note 2)
Fix this bit to “1” when using the debug function.
Fix this bit to “0.”
While a debugger is not used, the value is “0” at reading.
While a debugger is used, the value is “1” at reading.
Address-matching-detection 2
decision bit
(Valid when the address match-
ing detection 2 is selected.)
The value is “0” at reading.
00
0 : Disabled.
1 : Enabled.
0 : Matches with the contents of the address com-
pare register 0.
1 : Matches with the contents of the address com-
pare register 1.
1
Notes 1: At power-on reset, these bits become “0”; at hardware reset or software reset, these bits retain the value immediately before reset.
2: Be sure to set this bit to “1” immediately before the access to the address compare registers 0 and 1 (addresses 6816 to
6D16). Then, be sure to clear this bit to “0” immediately after this access.
b7 b6 b5 b4 b3 b2 b1 b0
Address compare register 0 (Addresses 6A16 to 6816)
Address compare register 1 (Addresses 6D16 to 6B16)
Undefined
23 to 0
Bit
Function
At reset
R/W
The address to be detected (in other words, the start address of instructions) is set here.
RW
b0
b7
b0
b7
(b23)
(b8)
(b15)
(b16)
b0
Note: When accessing to these registers, be sure to set the address compare register access enable bit (bit 2 at address 6716) to “1”
immediately before the access. Then, be sure to clear this bit to “0” immediately after this access.
Reference
18-3
Reference
18-4
Reference
18-5