2-61
3802 GROUP USER’S MANUAL
APPLICATION
2.5 A-D converter
Fig. 2.5.4 Structure of Interrupt request register 2
Fig. 2.5.5 Structure of Interrupt control register 2
Interrupt request register 2
b7 b6 b5 b4 b3 b2 b1 b0
B
0
Function
At reset
R W
0
1
2
3
0
0
0
Interrupt request reigster 2 (IREQ2) [Address : 3D
16
]
Name
CNTR
0
interrupt request bit
CNTR
1
interrupt request
bit
Serial I/O2 interrupt request
bit
INT
2
interrupt request bit
0 : No interrupt request
1 : Interrupt request
0 : No interrupt request
1 : Interrupt request
0 : No interrupt request
1 : Interrupt request
0 : No interrupt request
1 : Interrupt request
0 : No interrupt request
1 : Interrupt request
6
6
6
6
5
6
7
0
0
0 : No interrupt request
1 : Interrupt request
0 : No interrupt request
1 : Interrupt request
Nothing is allocated for this bit. This is a write disabled bit.
When this bit is read out, the value is “0.”
AD conversion interrupt
request bit
INT
4
interrupt request bit
6
6
6
“0” is set by software, but not “1.”
4
0
INT
3
interrupt request bit
6
0
AAAAAAAAAAAAA
AAAAAAAAAAAAA
7
Fix this bit to “0.”
AAAA
AAAA
1 : Interrupt enabled
Interrupt control register 2
b7 b6 b5 b4 b3 b2 b1 b0
0
B
0
Function
At reset
R W
0
1
2
3
0
0
0
Interrupt control reigster 2 (ICON2) [Address : 3F
16
]
Name
CNTR
0
interrupt enable bit
CNTR
1
interrupt enable bit
Serial I/O2 interrupt enable
bit
INT
2
interrupt enable bit
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
5
6
0
0
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
AD conversion interrupt
enable bit
INT
4
interrupt enable bit
4
0
INT
3
interrupt enable bit
0