參數資料
型號: M38049FFHKP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8.4 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64
文件頁數: 2/116頁
文件大?。?/td> 1261K
代理商: M38049FFHKP
Rev.1.01
Jan 25, 2005
page 10 of 114
REJ03B0131-0101Z
3804 Group (Spec. H)
Fig. 8 Structure of CPU mode register
[CPU Mode Register (CPUM)] 003B16
The CPU mode register contains the stack page selection bit, etc.
The CPU mode register is allocated at address 003B16.
CPU mode register
(CPUM : address 003B16)
b7
b0
Fix this bit to “1”.
Stack page selection bit
0 : 0 page
1 : 1 page
Processor mode bits
b1 b0
0
0 : Single-chip mode
0
1 :
1
0 :
Not available
1
1 :
Port XC switch bit
0 : I/O port function (stop oscillating)
1 : XCIN–XCOUT oscillating function
Main clock (XIN–XOUT) stop bit
0 : Oscillating
1 : Stopped
Main clock division ratio selection bits
b7 b6
0
0 :
φ = f(XIN)/2 (high-speed mode)
0
1 :
φ = f(XIN)/8 (middle-speed mode)
1
0 :
φ = f(XCIN)/2 (low-speed mode)
1
1 : Not available
1
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