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179
MITSUBISHI MICROCOMPUTER
3819 Group
3.3 Control registers
3. APPE NDIX
3819 Group USER’S MANUAL
3.3 Control registers
Fig. 3.3.2 Structure of Port P2 direction register
Fig. 3.3.1 Structure of Port Pi direction register (i = 4, 5, 6, 7, 8, A, B)
Port Pi direction register
b7 b6 b5 b4 b3 b2 b1 b0
B
0
Function
At reset
R W
0
1
2
3
4
5
6
7
Name
Port Pi
direction register
0
0
0
0
0
0
0
Port Pi direction register (PiD) (i = 4, 5, 6, 7, 8, A, B)
[Address:09
16
, 0B
16
, 0D
16
, 0F
16
, 11
16
, 15
16
, 17
16
]
0 : Port Pi
0
input mode
1 : Port Pi
0
output mode
0 : Port Pi
1
input mode
1 : Port Pi
1
output mode
0 : Port Pi
2
input mode
1 : Port Pi
2
output mode
0 : Port Pi
3
input mode
1 : Port Pi
3
output mode
0 : Port Pi
4
input mode
1 : Port Pi
4
output mode
0 : Port Pi
5
input mode
1 : Port Pi
5
output mode
0 : Port Pi
6
input mode
1 : Port Pi
6
output mode
0 : Port Pi
7
input mode
1 : Port Pi
7
output mode
(
Note
)
Note :
(
Note
)
Port P4 direction register [Address:09
16
]
Ports P4
0
and P4
5
are input ports. Accordingly, these bits do not have a
direction register function.
Port P2 direction register
b7 b6 b5 b4 b3 b2 b1 b0
B
0
1
Function
At reset
R W
1
1
Name
Port P2 direction register (P2D) [Address:05
16
]
4
5
6
7
Port P2
direction register
0
0
0
0
0 : Port P2
4
input mode
1 : Port P2
4
output mode
0 : Port P2
5
input mode
1 : Port P2
5
output mode
0 : Port P2
6
input mode
1 : Port P2
6
output mode
0 : Port P2
7
input mode
1 : Port P2
7
output mode
2
3
1
1
Because P2
0
to P2
3
are output ports, these bits do not have a
direction register function and nothing is allocated.