Rev.2.00
May. 24, 2006
page 24 of 90
REJ03B0028-0200
3826 Group (A version)
Key Input Interrupt (Key-on Wake Up)
The key input interrupt is enabled when any of port P2 is set to in-
put mode and the bit corresponding to key input control register is
set to “1”.
A Key input interrupt request is generated by applying “L” level
voltage to any pin of port P2 of which key input interrupt is en-
abled. In other words, it is generated when AND of input level
goes from “1” to “0”. A connection example of using a key input in-
terrupt is shown in Figure 22, where an interrupt request is gener-
ated by pressing one of the keys consisted as an active-low key
matrix which inputs to ports P20–P23.
Fig. 20 Connection example when using key input interrupt and port P2 block diagram
Port P20
latch
Port P20
direction register = “0”
Port P21
latch
Port P21
direction register = “0”
Port P22
latch
Port P22
direction register = “0”
Port P23
latch
Port P23
direction register = “0”
Port P24
latch
Port P24
direction register = “1”
Port P25
latch
Port P25
direction register = “1”
Port P26
latch
Port P26
direction register = “1”
Port P27
latch
Port P27
direction register = “1”
P20 input
P21 input
P22 input
P23 input
P24 output
P25 output
P26 output
P27 output
PULL register A
Bit 7
Port P2
Input reading circuit
Port PXx
“L” level output
P-channel transistor for pull-up
CMOS output buffer
Key input interrupt request
P27 key input control bit
P26 key input control bit
P25 key input control bit
P24 key input control bit
P23 key input control bit = “1”
PULL register A
Bit 6 = “1”
P22 key input control bit = “1”
P21 key input control bit = “1”
P20 key input control bit = “1”