參數(shù)資料
型號(hào): M3826AMFA-XXXFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, LQFP-100
文件頁(yè)數(shù): 85/95頁(yè)
文件大?。?/td> 1006K
代理商: M3826AMFA-XXXFP
Rev.2.00
May. 24, 2006
page 84 of 90
REJ03B0028-0200
3826 Group (A version)
3.3.9 Notes on A/D converter
(1)
Analog input pin
Make the signal source impedance for analog input low, or equip an analog input pin with an
external capacitor of 0.01
F to 1 F. Further, be sure to verify the operation of application
products on the user side.
● Reason
An analog input pin includes the capacitor for analog voltage comparison. Accordingly, when
signals from signal source with high impedance are input to an analog input pin, charge and
discharge noise generates. This may cause the A/D conversion precision to be worse.
(2)
Analog power source input pin AVss
The AVSS pin is an analog power source input pin. Regardless of using the A/D conversion
function or not, connect it as following :
AVSS : Connect to the VSS line
● Reason
If the AVSS pin is opened, the microcomputer may have a failure because of noise or others.
(3)
Reference voltage input pin VREF
Connect an approximately 1000 pF capacitor across the AVss pin and the VREF pin. Besides,
connect the capacitor across the VREF pin and the AVss pin at equal length as close as possible.
(4)
Clock frequency during A/D conversion
Use the A/D converter in the following conditions:
Select XIN-XOUT as system clock
φ by the system clock selection bit (bit 7 of CPU mode register
(address 3B16)). When selecting XCIN-XCOUT as system clock
φ, the A/D conversion function cannot
be used.
f(XIN) is 500 kHz or more.
Do not execute the STP or WIT instruction during A/D conversion.
● Reason
The comparator consists of a capacity coupling, and a charge of the capacity will be lost if the
clock frequency is too low. This may cause the A/D conversion precision to be worse.
(5)
When the falling edge is input to the ADT pin during A/D conversion at the time of A/D external
trigger effective, the conversion processing is interrupted and the A/D conversion starts again. In
addition, even if “0” is set to the AD conversion completion bit by the program during A/D conversion,
re-conversion is not performed but the original conversion is continued.
(6)
The A/D converter will not operate normally if one of the following operation is applied during the
A/D conversion:
Writing to CPU mode register
Writing to AD control register
Executing the STP instruction and WIT instruction
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