Rev.2.00
May. 24, 2006
page 43 of 90
REJ03B0028-0200
3826 Group (A version)
CTCSS Function
(Continuous Tone-Controlled Squelch
System)
The CTCSS function is used to generate the sine wave of single
frequency automatically. The CTCSS output waveform can be out-
put from DA2 pin. CTCSS waveform is outputted by setting “1” to
the CTCSS/DA2 output enable bit (bit 1 of address 003616), and
setting “1” to the CTCSS/DA2 selection bit (bit 3 of address
003616). In order to set the frequency of CTCSS output, value is
written in the CTCSS timer. The CTCSS timer consists of a 10-bit
timer. When writing a value to the CTCSS timer, write the low-or-
der byte first.
Rating frequency (Hz)
67.0
77.0
88.5
100.0
107.2
114.8
123.0
131.8
141.3
151.4
162.2
173.8
186.2
203.5
218.1
233.6
250.3
n (Timer value)
465
405
352
312
291
271
253
236
220
205
192
179
167
153
142
133
124
Error frequency (Hz)
0.06
–0.03
0.027
–0.16
–0.18
0.09
0.03
0.06
0.10
0.30
–0.28
–0.19
–0.58
0.43
–0.39
–0.30
Deviation (%)
0.089
–0.038
0.030
–0.160
–0.167
0.078
0.026
0.043
0.073
0.198
–0.174
–0.109
–0.101
–0.284
0.198
–0.167
–0.120
Output frequency (Hz)]
67.06
76.97
88.53
99.84
107.02
114.89
123.03
131.86
141.40
151.70
161.92
173.61
186.01
202.92
218.53
233.20
250.00
Table 10 Example of frequency accuracy (at f(XIN) = 4 MHz)
f (XIN)/2
(n+1) 64
Vcc
2
When reading a value from the CTCSS timer, read the high-order
byte first. By the value written in the CTCSS timer is n, the sine
wave of the following frequency is generated.
f =
(Hz)
Set “00616” or more to the CTCSS timer. “0016” is automatically
set to the high-order of the CTCSS timer and “0616” is automati-
cally set to the low-order of the CTCSS timer after reset release.
The amplitude of CTCSS output is obtained by the following for-
mula.
C =
If the D/A2 conversion register is read when the CTCSS function
is selected, the digital value of CTCSS output can be read.
Table 10 shows the example of frequency accuracy (at f(XIN) = 4
MHz).
Fig. 45 Equivalent connection circuit of D/A converter
AVSS
VREF
“0”
“1”
MSB
“0”
“1”
R
2R
R
2R
R
2R
R
2R
R
2R
R
2R
R
2R
LSB
2R
DAi
DAi conversion register
DAi output enable bit