參數(shù)資料
型號: M3826AMFA-XXXGP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, LQFP-100
文件頁數(shù): 47/93頁
文件大?。?/td> 996K
代理商: M3826AMFA-XXXGP
Rev.2.00
May. 24, 2006
page 51 of 90
REJ03B0028-0200
3826 Group (A version)
TOUT/
φ OUTPUT FUNCTION
The system clock
φ or timer 2 divided by 2 (TOUT output) can be
output from port P43 by setting the TOUT/
φ output enable bit of the
timer 123 mode register and the TOUT/
φ output control register.
Set the P43/
φ/TOUT pin to output mode (set “1” to bit 3 of port P4
direction register) when outputting TOUT/
φ.
Fig. 55 Structure of TOUT/
φφφφφ output-related registers
TOUT/
φ output control bit
0 : System clock
φ output
1 : TOUT output
Not used (“0” at reading)
TOUT/
φ output control register
(CKOUT : address 002A16)
b7
b0
Timer 123 mode register
(T123M : address 002916)
TOUT output active edge switch bit
0 : Start at “H” output
1 : Start at “L” output
TOUT/
φ output enable bit
0 : TOUT/
φ output disabled
1 : TOUT/
φ output enabled
Timer 2 write control bit
0 : Write data in latch and timer
1 : Write data in latch only
Timer 2 count source selection bit
0 : Timer 1 output
1 : f(XIN)/16
(or f(XCIN)/16 in low-speed mode)
Timer 3 count source selection bit
0 : Timer 1 output
1 : f(XIN)/16
(or f(XCIN)/16 in low-speed mode)
Timer 1 count source selection bit
0 : f(XIN)/16
(or f(XCIN)/16 in low-speed mode)
1 : f(XCIN)
Not used (“0” at reading)
b7
b0
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