參數(shù)資料
型號(hào): M3826AMFA-XXXGP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, LQFP-100
文件頁數(shù): 50/95頁
文件大?。?/td> 1006K
代理商: M3826AMFA-XXXGP
Rev.2.00
May. 24, 2006
page 52 of 90
REJ03B0028-0200
3826 Group (A version)
Fig. 56 Example of reset circuit
RESET CIRCUIT
When the power source voltage is within limits, and main clock
XIN-XOUT is stable, or a stabilized clock is input to the XIN pin, if
the RESET pin is held at an “L” level for 2
s or more, the micro-
computer is in an internal reset state. Then the RESET pin is
returned to an “H” level, reset is released after approximate 8200
cycles of f(XIN), the program in address FFFD16 (high-order byte)
Fig. 57 Reset Sequence
and address FFFC16 (low-order byte). Make sure that the reset in-
put voltage is less than 0.2 VCC(min.) for the power source voltage
of VCC(min.).
*VCC(min.) = Minimum value of power supply voltage limits
applied to VCC pin
VCC
RESET
VCC
RESET
Power source
voltage detection
circuit
VCC
RESET
Power on
0.2VCC level
Oscillation stabilized
2
s
XIN
0V
(Note)
Note: Reset release voltage Vcc = Vcc (min.)
ADL
FFFC
FFFD
ADH,
Undefined
XIN : Approx. 8200 cycles
Note : The frequency of system clock
φ is f(XIN) divided by 8.
Reset address from
vector table
RESET
Internal reset
Address
Data
SYNC
System
clock
φ
XIN
ADH
ADL
Undefined
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