參數(shù)資料
型號： M3826AMFA-XXXGP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100
封裝： PLASTIC, LQFP-100
文件頁數(shù)： 80/95頁
文件大?。?/td> 1006K
代理商： M3826AMFA-XXXGP
Rev.2.00
May. 24, 2006
page 79 of 90
REJ03B0028-0200
3826 Group (A version)
3.3.5 Notes on timer
This clause describes notes for the various operation modes of Timer X, Timer Y, Timer 1, Timer 2, and
Timer 3.
(1) Timer X
■For all modes
◆When reading and writing to the timer X high-order and low-order registers, be sure to read/write
both the timer X high- and low-order registers.
When reading the timer X high-order and low-order registers, read the high-order register first.
When writing to the timer X high-order and low-order registers, write the low-order register first.
The timer X cannot perform the correct operation if the next operation is performed.
Write operation to the high- or low-order register before reading the timer X low-order register
Read operation from the high- or low-order register before writing to the timer X high-order
register
◆When the operation “writing data only to the latch” is selected by the timer X write control bit (bit
0 of timer X mode register (address 2716)) is selected, a value is simultaneously set to the timer
X and the timer X latch if the writing in the high-order register and the underflow of timer X are
performed at the same timing. Unexpected value may be set in the high-order timer on this
occasion.
■Pulse output mode
◆When reading port P54 (bit 4 of port P5 register (address 0A16)) in the pulse output mode, the
pin state is read instead of the contents of the port latch.
■Real time port function
◆After reset is released, the port P5 direction register is set as the input mode and ports P50–P57
functions as regular ports. To use as the RTP function pin, set the corresponding bit of the port
P5 direction register to the output mode.
■CNTR0 active edge selection
◆The CNTR0 active edge selection bit (bit 6 of timer X mode register) also effects the active edge
of the generation of the CNTR0 interrupt request.
(2) Timer Y
■For all modes
◆When reading and writing to the timer Y high-order and low-order registers, be sure to read/write
both the timer Y high- and low-order registers.
When reading the timer Y high-order and low-order registers, read the high-order register first.
When writing to the timer Y high-order and low-order registers, write the low-order register first.
The timer Y cannot perform the correct operation if the next operation is performed.
Write operation to the high- or low-order register before reading the timer Y low-order register
Read operation from the high- or low-order register before writing to the timer Y high-order
register
■CNTR1 active edge selection
◆The CNTR1 active edge selection bit (bit 6 of timer Y mode register (address 2816)) also effects
the active edge of the generation of the CNTR1 interrupt request. However, both edges are valid
for the request generation regardless of the bit state in the continuous HL pulse-width measurement
mode.
相關(guān)PDF資料
PDF描述
M38268MCA-XXXGP 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100
M3826AMFA-XXXFP 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100
M3826AMFLXXXGP 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP100
M38268MCLXXXFP 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP100
M3826AMFLXXXFP 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M3826-BK001 制造商:Alpha Wire 功能描述:
M3826-BK002 制造商:Alpha Wire 功能描述:
M3826-BK005 制造商:Alpha Wire 功能描述:
M3826-BK199 制造商:Alpha Wire 功能描述:
M3826-BLACK-100 制造商:Alpha Wire 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*