38B5 Group User’s Manual
1-15
HARDWARE
FUNCTIONAL DESCRIPTION
Table 6 List of I/O port functions (1)
Pin
Name
Input/Output
I/O Format
Non-Port Function
Related SFRs
Ref.No.
P00/FLD8–
Port P0
Input/output,
CMOS compatible input level FLD automatic display function FLDC mode register
(1)
P07/FLD15
individual bits
High-breakdown voltage P-
Port P0FLD/port switch register
channel open-drain output
with pull-down resistor
P10/FLD16– Port P1
Output
High-breakdown voltage P-
FLDC mode register
(2)
P17/FLD23
channel open-drain output
with pull-down resistor
P20/BUZ02/
Port P2
Input/output,
Low-voltage input level
Buzzer output (P20)
FLDC mode register
(3)
FLD0
individual bits
High-breakdown voltage P-
FLD automatic display function Port P2FLD/port switch register
P21/FLD1–
channel open-drain output
FLD automatic display function Buzzer output control register
(1)
P27/FLD7
P30/FLD24– Port P3
Output
High-breakdown voltage P-
FLDC mode register
(2)
P37/FLD31
channel open-drain output
with pull-down resistor
P40/INT0,
Port P4
Input/output,
CMOS compatible input level External interrupt input
Interrupt edge selection register
(5-1)
P41/INT1,
individual bits
N-channel open-drain output In the mask option type P, INT3
(5-2)
P42/INT3
cannot be used.
P43/BUZ01
Buzzer output
Buzzer output control register
(4)
P44/PWM1
PWM output
Timer 56 mode register
(6)
P45/T1OUT
Timer output
Timer 12 mode register
(7)
P46/T3OUT
Timer output
Timer 34 mode register
(7)
P47/INT2
Input
CMOS compatible input level External interrput input
Interrupt edge selection register
(8)
Interrupt interval determination
control register
P50/SIN1
Port P5
Input/output,
CMOS compatible input level Serial I/O1 function I/O
Serial I/O1 control register 1, 2
(9)
P51/SOUT1,
individual bits
CMOS 3-state output
(10)
P52/SCLK11,
P53/SCLK12
P54/RXD,
Serial I/O2 function I/O
Serial I/O2 control register
(9)
P55/TXD,
UART control register
(10)
P56/SCLK21
P57/SRDY2/
(11)
SCLK22
P60/CNTR1 Port P6
CMOS compatible input level External count input
Interrupt edge selection register
(5-1)
N-channel open-drain output In the mask option type P,
(5-2)
P61/CNTR0/
CMOS compatible input level CNTR1 cannot be used.
(12)
CNTR2
CMOS 3-state output
P62/SRDY1/
Serial I/O1 function I/O
Serial I/O1 control register 1, 2
(13)
AN8
A-D conversion input
A-D control register
P63/AN9
A-D conversion input
A-D control register
(14)
Dimmer signal output
P8FLD output control bit
P64/INT4/
Serial I/O1 function I/O
Serial I/O1 control register 1, 2
(15)
SBUSY1/AN10
A-D conversion input
A-D control register
External interrupt input
Interrupt edge selection register
P65/SSTB1/
Serial I/O1 function I/O
Serial I/O1 control register 1, 2
(16)
AN11
A-D conversion input
A-D control register
P70/AN0–
Port P7
A-D conversion input
A-D control register
(14)
P77/AN7