參數(shù)資料
型號: M491B1
廠商: 意法半導(dǎo)體
英文描述: SINGLE-CHIP VOLTAGE SYNTHESIS TUNING SYSTEM WITH 1 ANALOG CONTROL
中文描述: 單片電壓合成調(diào)諧系統(tǒng)的1個模擬控制
文件頁數(shù): 5/16頁
文件大小: 135K
代理商: M491B1
40
12
5
I (mA)
Typ.max. 20msec
Typ.max. 8msec
t (ms)
4
Figure2
ERASECYCLE
Figure3 showsthe timing and thewaveform of the
current flowing through Pin 2 during the erase
operation. The peak current is 7mA (max) during
the erase cycle and 6mA (max) during the read
cycle. The typical erase time is 10ms for a new
device and increases with the number of modify
operationsup to200ms after1000 cycles.
In orderto protect the memory in case of failureof
some bits the modify operation is stopped after
1sec.
READCYCLE
Figure 4 showsthe waveform ofthe current during
a read operation.
32 44
256
μ
s
6mA
7mA
128
μ
s
52
4
Figure3
64
32 44
116
μ
s
256
μ
s
40mA
6mA
12mA
After about 30msec
4
Figure1
44
6mA
128
μ
s
84
μ
s
480
μ
s
4
Figure 4
M491B
5/16
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