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參數(shù)資料
| 型號(hào)： | M491B1 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | SINGLE-CHIP VOLTAGE SYNTHESIS TUNING SYSTEM WITH 1 ANALOG CONTROL |
| 中文描述： | 單片電壓合成調(diào)諧系統(tǒng)的1個(gè)模擬控制 |
| 文件頁(yè)數(shù)： | 7/16頁(yè) |
| 文件大?。?/td> | 135K |
| 代理商： | M491B1 |
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V
A
D/A
Converter
V
C
Varicap
V
B
V
B
V
A
V
C
down-up
4
Figure6
PIN 6 : DIGITAL AFT STATUS OUTPUT
(see Figure 7)
This outputshows the status ofthe digitalAFT. Itis
low when the digital AFT is enabled and it can
directly drive a LED.
The outputconsists of anopen drain transistor.
PINS7 & 8 : OSCILLATORINPUT/OUTPUT
(see Figure 8)
The frequency of the clock oscillator should be
between 445and510kHzusingalow-costceramic
resonator. In these conditions the value of the
referencefrequencyofthetransmittercan beinthe
same range. Inotherwords the transmitterandthe
receiver can operate with different reference fre-
quencies.
6
max.13.2V
4
Figure7
7
8
455to
510kHz
100pF
100pF
4
Figure 8
PIN 9 : V
DD
The supply voltage has to be comprised in the
range 4.75 to 5.25V. When it is appliedan internal
poweron resetof 0.5s is generated.
The memory position 1 is automaticallyread if the
mains on option input (Pin25) is grounded.
PIN 10 : TEST
Thispinis usedfortestingandhastobeconnected
to V
SS
.
PIN 11 : I.R. SIGNAL INPUT(see Figure9)
The integrated receiver decodes signals transmit-
ted by M708, address9.
The minimum signal to be appliedis 0.5V peak-to-
peak. (AC-coupled).
The receiver input section performs the following
tests on the incomingsignal to achievethe neces-
sarynoise immunity :
- measurement of the pulse distance (time base
synchronization)
M491B
7/16
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| M49-20.000-18-30/50/4085 | 制造商:MEC 功能描述:Crystal SMD 20.000MHz HC49S-SMD |
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| M49-25.000-18-30/50/4085 | 制造商:MEC 功能描述:Crystal SMD 25.000MHz HC49S-SMD |
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