參數(shù)資料
型號: M50LPW041N1T
廠商: 意法半導(dǎo)體
英文描述: 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory
中文描述: 4兆位512KB的× 8,統(tǒng)一座3V電源低引腳數(shù)快閃記憶體
文件頁數(shù): 17/37頁
文件大?。?/td> 268K
代理商: M50LPW041N1T
17/37
M50LPW041
Table 15. Low Pin Count Register Configuration Map
(1)
Note: 1. This map is referred to the boot memory (ID0-ID3 floating or driven, Low).
Mnemonic
Register Name
Memory Address
Default
Value
Access
Top
Bottom
T_BLOCK_LK
Top Block Lock Register (Block 7)
FF7F0002h
008F0002h
01h
R/W
T_MINUS01_LK
Top Block [-1] Lock Register (Block 6)
FF7E0002h
008E0002h
01h
R/W
T_MINUS02_LK
Top Block [-2] Lock Register (Block 5)
FF7D0002h
008D0002h
01h
R/W
T_MINUS03_LK
Top Block [-3] Lock Register (Block 4)
FF7C0002h
008C0002h
01h
R/W
T_MINUS04_LK
Top Block [-4] Lock Register (Block 3)
FF7B0002h
008B0002h
01h
R/W
T_MINUS05_LK
Top Block [-5] Lock Register (Block 2)
FF7A0002h
008A0002h
01h
R/W
T_MINUS06_LK
Top Block [-6] Lock Register (Block 1)
FF790002h
00890002h
01h
R/W
T_MINUS07_LK
Top Block [-7] Lock Register (Block 0)
FF780002h
00880002h
01h
R/W
GPI_REG
General Purpose Input Register
FF7C0100h
008C0100h
N/A
R
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