參數(shù)資料
型號(hào)： M52D128168A-10BG
廠商： ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
元件分類： DRAM
英文描述： 2M x 16 Bit x 4 Banks Synchronous DRAM
中文描述： 8M X 16 SYNCHRONOUS DRAM, 7 ns, PBGA54
封裝： 8 X 8 MM, LEAD FREE, FBGA-54
文件頁(yè)數(shù)： 26/47頁(yè)
文件大小： 1209K
代理商： M52D128168A-10BG
ES MT
12. About Burst Type Control
Preliminary
M52D128168A
Elite Semiconductor Memory Technology Inc.
Revision
:
1.0
Publication Date
:
May. 2007
26/47
Sequential Counting
Interleave Counting
At MRS A3 = “0”. See the BURST SEQUENCE TABLE. (BL = 4,8)
BL = 1, 2, 4, 8 and full page.
Basic
MODE
At MRS A3 = “1”. See the BURST SEQUENCE TABLE. (BL = 4,8)
BL = 4, 8 At BL =1, 2 interleave Counting = Sequential Counting
Random
MODE
Random Column Access
t
CCD
= 1 CLK
Every cycle Read/Write Command with random column address can realize
Random Column Access.
That is similar to Extended Data Out (EDO) Operation of conventional DRAM.
13. About Burst Length Control
1
At MRS A210 = “000”
At auto precharge . t
RAS
should not be violated.
2
At MRS A210 = “001”
At auto precharge . t
RAS
should not be violated.
4
At MRS A210 = “010”
8
At MRS A210 = “011”
Basic
MODE
Full Page
At MRS A210 = “111”
At the end of the burst length , burst is warp-around.
t
BDL
= 1, Valid DQ after burst stop is 1, 2 for CAS latency 2, 3 respectively.
Using burst stop command, any burst length control is possible.
Random
MODE
Burst Stop
RAS Interrupt
(Interrupted by
Precharge)
Before the end of burst. Row precharge command of the same bank stops read /write burst
with auto precharge.
t
RDL
= 2clk with DQM , Valid DQ after burst stop is 1, 2 for CAS latency 2, 3 respectively.
During read/write burst with auto precharge, RAS interrupt can not be issued.
Interrupt
MODE
CAS Interrupt
Before the end of burst, new read/write stops read/write burst and starts new read/write
burst.
During read/write burst with auto precharge, CAS interrupt can not be issued.
相關(guān)PDF資料
PDF描述
M52D128168A-10TG 2M x 16 Bit x 4 Banks Synchronous DRAM
M52D128168A-7.5BG 2M x 16 Bit x 4 Banks Synchronous DRAM
M52D128168A-7.5TG 2M x 16 Bit x 4 Banks Synchronous DRAM
M52D16161A 512K x 16Bit x 2Banks Synchronous DRAM
M52D16161A-10BG 512K x 16Bit x 2Banks Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M52D128168A-10BIG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM
M52D128168A-10TG 制造商:ELITE SEMICONDUCTOR 功能描述:SDRAM 128MB 1.8V 100MHZ TSOPII54
M52D128168A-10TIG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM
M52D128168A-7.5BG 制造商:ELITE SEMICONDUCTOR 功能描述:SDRAM 128MB 1.8V 133MHZ FBGA54 制造商:ELITE SEMICONDUCTOR 功能描述:SDRAM, 128MB, 1.8V, 133MHZ, FBGA54 制造商:ELITE SEMICONDUCTOR 功能描述:IC, SDRAM, 128MBIT, 133MHZ, FBGA-54; Memory Type:DRAM - Sychronous; Memory Configuration:2M x 16; Page Size:128MB; Memory Case Style:FBGA; No. of Pins:54; IC Interface Type:Parallel; Operating Temperature Min:0C; Frequency:133MHz ;RoHS Compliant: Yes
M52D128168A-7.5BIG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM
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