參數(shù)資料
型號(hào): M52S32162A-10TG
廠商: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
元件分類: DRAM
英文描述: 1M x 16Bit x 2Banks Synchronous DRAM
中文描述: 2M X 16 SYNCHRONOUS DRAM, 8 ns, PDSO54
封裝: 0.400 INCH, LEAD FREE, TSOP2-54
文件頁(yè)數(shù): 21/30頁(yè)
文件大小: 787K
代理商: M52S32162A-10TG
ES MT
Clock Suspension & DQM Operation Cycle @CAS Latency=2, Burst Length=4
M52S32162A
Elite Semiconductor Memory Technology Inc.
Publication Date
:
Apr. 2007
Revision
:
1.2
21/30
*Note:1.DQM is needed to prevent bus contention.
C L O C K
C K E
A D D R
DQ
DQ M
A10/AP
Ra
Ca
Cb
C c
Ra
Qa0
Qa1
Qa2
Qa3
t
S H Z
Qb1
Qb0
t
S H Z
Dc0
Dc2
*No t e 1
Row Active
Read
Clock
Suspension
Read
Read DQM
W rite
W rite
DQ M
Clock
Suspension
W rite
DQ M
:Don't Care
BA
CS
RAS
CAS
W E
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
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