ES MT

Read Interrupted by Precharge Command & Read Burst Stop Cycle @Burst Length =Full page

M52S32162A

Elite Semiconductor Memory Technology Inc.

Publication Date

:

Apr. 2007

Revision

:

1.2

22/30

*Note:

1.Burst can’t end in full page mode, so auto precharge can’t issue.

2.About the valid DQs after burst stop, it is same as the case of RAS interrupt.

Both cases are illustrated above timing diagram. See the label 1,2 on them.

But at burst write, burst stop and RAS interrupt should be compared carefully.

Refer the timing diagram of “Full page write burst stop cycle”.

3.Burst stop is valid at every burst length.

C L O C K

C K E

A D D R

DQ

DQ M

A10/AP

BA

RAa

CAa

CAb

RAa

QAa0 QAa1

QAb1

QAb0

QAb2

*Note1

Row Active

( A-Bank)

Read

(A- Bank)

Burst Stop

Read

(A- Bank)

:Don't Care

HIGH

CL=2

CL=3

QAa2 QAa3 QAa4

QAb3 QAb4 QAb5

QAa0 QAa1

QAb1

QAb0

QAb2

QAa2 QAa3 QAa4

QAb3 QAb4 QAb5

1

1

2

2

Precharge

( A- Bank)

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

CS

RAS

CAS

WE

*Note2