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參數(shù)資料
| 型號： | M58WR032FT60ZB6T |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | PROM |
| 英文描述： | 2M X 16 FLASH 1.8V PROM, 60 ns, PBGA56 |
| 封裝： | 7.70 X 9 MM, 0.75 MM PITCH, VFBGA-56 |
| 文件頁數(shù)： | 57/86頁 |
| 文件大?。?/td> | 1516K |
| 代理商： | M58WR032FT60ZB6T |
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Obsolete
Product(s)
- Obsolete
Product(s)
M58WR032FT, M58WR032FB
60/86
APPENDIX B. COMMON FLASH INTERFACE
The Common Flash Interface is a JEDEC ap-
proved, standardized data structure that can be
read from the Flash memory device. It allows a
system software to query the device to determine
various electrical and timing parameters, density
information and functions supported by the mem-
ory. The system can interface easily with the de-
vice, enabling the software to upgrade itself when
necessary.
When the Read CFI Query Command is issued
the device enters CFI Query mode and the data
dresses used to retrieve the data. The Query data
is always presented on the lowest order data out-
puts (DQ0-DQ7), the other outputs (DQ8-DQ15)
are set to 0.
The CFI data structure also contains a security
area where a 64 bit unique security number is writ-
Map). This area can be accessed only in Read
mode by the final user. It is impossible to change
the security number after it has been written by
ST. Issue a Read Array command to return to
Read mode.
Table 30. Query Structure Overview
Note: The Flash memory display the CFI data structure when CFI Query command is issued. In this table are listed the main sub-sections
detailed in Tables 31, 32, 33 and 34. Query data is always presented on the lowest order data outputs.
Offset
Sub-section Name
Description
00h
Reserved
Reserved for algorithm-specific information
10h
CFI Query Identification String
Command set ID and algorithm data offset
1Bh
System Interface Information
Device timing & voltage information
27h
Device Geometry Definition
Flash device layout
P
Primary Algorithm-specific Extended Query table
Additional information specific to the Primary
Algorithm (optional)
A
Alternate Algorithm-specific Extended Query table
Additional information specific to the Alternate
Algorithm (optional)
80h
Security Code Area
Lock Protection Register
Unique device Number and
User Programmable OTP
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M58WR032FT70ZB6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit (2Mb x 16, Multiple Bank, Burst) 1.8V Supply Flash Memory |
| M58WR032FT70ZB6E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit (2Mb x 16, Multiple Bank, Burst) 1.8V Supply Flash Memory |
| M58WR032FT70ZB6F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit (2Mb x 16, Multiple Bank, Burst) 1.8V Supply Flash Memory |
| M58WR032FT70ZB6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit (2Mb x 16, Multiple Bank, Burst) 1.8V Supply Flash Memory |
| M58WR032FT80ZB6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit (2Mb x 16, Multiple Bank, Burst) 1.8V Supply Flash Memory |
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