參數(shù)資料
型號: M5M29FT800RV-80
廠商: Mitsubishi Electric Corporation
英文描述: 8,388,608-BIT (1048,576-576-WORD BY 8-BIT / 524,288-WORD BY16-BIT)CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY
中文描述: 8,388,608位(1048,576 - 576 - Word的8位/ 524,288字BY16位)的CMOS 3.3只,塊擦除閃存
文件頁數(shù): 8/14頁
文件大小: 151K
代理商: M5M29FT800RV-80
MITSUBISHI LSIs
M5M29FB/T800FP,VP,RV-80,-10,-12
8,388,608-BIT (1048,576-WORD BY 8-BIT / 524,288-WORD BY16-BIT)
CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY
May 1997 , Rev.6.1
8
Write Mode
(/CE control)
AC ELECTRICAL CHARACTERISTICS
(Ta = 0 ~ 70°C, Vcc = 3.3V±0.3V)
Read timing parameters during command write operations mode are the same as during read-only operations mode.
Typical values at Vcc=3.3V, Ta=25°C
Erase and Program Performance
Block Erase Time
Main Block Write Time (Page Mode)
Page Write Time
Parameter
ms
sec
ms
Unit
Typ
7.5
1.9
50
Max
120
3.8
600
Min
Vcc Power Up / Down Timing
Symbol
Unit
Typ
2
Max
Min
t
VCS
Parameter
/RP =V
IH
set-up time from Vccmin
μs
During power up/down, by the noise pulses on control pins, the device has possibility of accidental erasure or programming.
The device must be protected against initiation of write cycle for memory contens during power up/down.
The delay time of min.2μsec is always required before read operation or write operation is initiated from the time Vcc reaches
Vccmin during power up/down. By holding /RP V
IL
, the contens of memory is protected during Vcc power up/down.
During power up, /RP must be held V
IL
for min.2μs from the time Vcc reaches Vccmin.
During power down, /RP must be held V
IL until Vcc reaches GND.
/RP doesn't have latch mode ,so /
RP must be held V
IH during read operation or erase/program operation.
Symbol
Parameter
Unit
Max
Min
120
50
10
Max
Min
100
50
10
Limits
M5M29FB/T800-10
Typ
M5M29FB/T800-12
Typ
Max
Min
80
50
10
M5M29FB/T800-80
Typ
t
WC
t
AS
t
AVAV
t
AVEH
Write cycle time
Address set-up time
ns
ns
t
DH
t
WS
t
EHDX
t
WLEL
Data hold time
Write enable set-up time
ns
ns
t
DS
t
DVEH
Data set-up time
ns
50
10
50
10
50
10
t
AH
t
EHAX
Address hold time
ns
t
CEP
t
CEPH
t
BS
t
BH
t
ELEH
t
EHEL
t
FL/HEH
t
EHFL/H
/CE pulse width
/CE pulse width high
Byte enable high or low set-up time
Byte enable high or low hold time
ns
ns
ns
ns
60
20
50
100
60
20
50
120
60
20
50
80
t
WH
t
EHWH
Write enable hold time
ns
0
0
0
0
0
0
t
PS
t
PHEL
/RP high recovery to write enable low
ns
500
500
500
t
BLS
t
WPS
t
BLH
t
WPH
Block Lockhold from valid SRD
ns
0
0
t
QVPH
0
t
EHRL
t
EHRL
/CE enable high to RY/BY low
ns
100
120
80
t
DAP
t
DAE
t
EHRH1
t
EHRH2
Duration of auto-program operation
Duration of auto-block erase operation
ms
ms
7.5
50
120
600
120
600
7.5
50
7.5
50
120
600
Block Lock set-up to write enable high
ns
100
120
t
PHHEH
80
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