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參數(shù)資料
| 型號(hào)： | M5M5W816WG-85HI |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM |
| 中文描述： | 8388608位（524288字由16位）的CMOS靜態(tài)RAM |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大?。?/td> | 102K |
| 代理商： | M5M5W816WG-85HI |
MITSUBISHI ELECTRIC
M5M5W816WG - 85HI
2001.4.11 Ver. 2.0
8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM
MITSUBISHI LSIs
PRELIMINARY
Some parametric limits are subject to change
6
Note 3: Hatching indicates the state is "don't care".
Note 4: A Write occurs during S1# low, S2 high overlaps BC1# and/or BC2# low and W# low.
Note 5: When the falling edge of W# is simultaneously or prior to the falling edge of BC1# and/or BC2# or the falling edge of S1#
or rising edge of S2, the outputs are maintained in the high impedance state.
Note 6: Don't apply inverted phase signal externally when DQ pin is in output mode.
t
h
(D)
t
su
(D)
DQ
1~16
t
su
(BC1) or
t
su
(BC2)
t
rec
(W)
t
su
(A)
t
CW
A
0~18
W#
Write cycle (BC# control mode)
DATA IN
STABLE
(Note3)
(Note3)
(Note4)
(Note5)
(Note3)
(Note3)
S1#
BC1#,BC2#
(Note3)
(Note3)
S2
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| M5M5W816WG-85H | 8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM |
| M5M5W816WG-85L | 8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM |
| M5M5W816WG-85LI | 8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM |
| M5M5W816WG-10H | 8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM |
| M5M5W816WG-10HI | 8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM |
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