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參數(shù)資料
| 型號： | M66256FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 5120 x 8-BIT LINE MEMORY (FIFO) |
| 中文描述： | 5120 × 8位列內(nèi)存（先進(jìn)先出） |
| 文件頁數(shù)： | 10/11頁 |
| 文件大小： | 148K |
| 代理商： | M66256FP |
10
MITSUBISHI
DIGITAL ASSP
M66256FP
5120
×
8-BIT LINE MEMORY (FIFO)
Shortest read of data “n” written in cycle n
Cycle n–1 on read side should be started after end of cycle n+1 on write side
When the start of cycle n–1 on read side is earlier than the end of cycle n+1 on write side, output Q
n
of cycle n becomes invalid.
In the figure shown below, the read of cycle n–1 is invalid.
Longest read of data “n” written in cycle n: 1-line delay
Cycle n <1>* on read side should be started when cycle n <2>* on write is started
Output Qn of n cycle <1>* can be read until the start of reading side n cycle <1>* and the start of writing side n cycle <2>* over-
lap each other.
invalid
(n)
(n+3)
(n)
(n+2)
(n+1)
Cycle n
Cycle n+1
Cycle n+2
Cycle n+3
Cycle n–2
Cycle n–1
Cycle n
WCK
RCK
D
n
Q
n
(n–1)<2>*
(n)<2>*
(n–1)<1>*
(00) <2>*
(n)<1>*
Cycle n <1>*
Cycle 0 <2>*
Cycle n <2>*
Cycle n <0>*
Cycle 0 <1>*
Cycle n <1>*
WCK
RCK
D
n
(n)<0>*
(0)<1>*
(n–1)<1>*
(n)<1>*
(n–1)<0>*
Q
n
<0>*, <1>* and <2>* indicates a line value.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M66257 | 5120 x 8-BIT x 2 LINE MEMORY (FIFO) |
| M66257FP | 5120 x 8-BIT x 2 LINE MEMORY (FIFO) |
| M66258 | 8192 x 8-BIT LINE MEMORY |
| M66258FP | 8192 x 8-BIT LINE MEMORY |
| M66260FP | 8 x 4 CROSSPOINT SWITCH with MIXING FUNCTION |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M66256FP(#TF0T) | 制造商:Renesas Electronics Corporation 功能描述: |
| M66257 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:5120 x 8-BIT x 2 LINE MEMORY (FIFO) |
| M66257FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:5120 x 8-BIT x 2 LINE MEMORY (FIFO) |
| M66258 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8192 x 8-BIT LINE MEMORY |
| M66258FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8192 x 8-BIT LINE MEMORY |
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