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參數(shù)資料
| 型號： | M95010 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 1K Serial SPI EEPROM with High Speed Clock and Positive Clock Strobe(帶高速時(shí)鐘和正向時(shí)鐘選通的1K串聯(lián)SPI EEPROM) |
| 中文描述： | 一千串行SPI EEPROM，帶有高速時(shí)鐘和積極的時(shí)鐘選通（帶高速時(shí)鐘和正向時(shí)鐘選通的一千串聯(lián)的SPI EEPROM的） |
| 文件頁數(shù)： | 2/20頁 |
| 文件大?。?/td> | 151K |
| 代理商： | M95010 |
Symbol
Parameter
Value
Unit
T
A
Ambient Operating Temperature
–40 to 125
°
C
T
STG
Storage Temperature
–65 to 150
°
C
T
LEAD
Lead Temperature, Soldering
(SO8 package)
(PSDIP8 package)
40 sec
10 sec
215
260
°
C
V
O
Output Voltage
–0.3 to V
CC
+0.6
V
V
I
Input Voltage with respect to Ground
–0.3 to 6.5
V
V
CC
Supply Voltage
–0.3 to 6.5
V
V
ESD
Electrostatic Discharge Voltage (Human Body model)
(2)
4000
V
Electrostatic Discharge Voltage (Machine model)
(3)
500
V
Notes:
1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings"
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and
other relevant quality documents.
2. MIL-STD-883C, 3015.7 (100pF, 1500
)
3. EIAJ IC-121 (Condition C) (200pF, 0
)
Table 2. Absolute Maximum Ratings
(1)
The device connected to the bus is selected when
the chip select input (S) goes low. Communications
with the chip can be interrupted with a hold input
(HOLD). The write operation is disabled by a write
protect input (W).
Data is clocked in during the low to high transition
of clock C, data is clocked out during the high to
low transition of clock C.
SIGNALS DESCRIPTION
Serial Output (Q).
The output pin is used to trans-
fer data serially out of the Memory. Data is shifted
out on the falling edge of the serial clock.
Serial Input (D).
The input pin is used to transfer
data serially into the device. It receives instructions,
addresses, and the data to be written. Input is
latched on the rising edge of the serial clock.
D
VSS
C
HOLD
Q
W
S
VCC
AI00893
M950x0
1
2
3
4
8
7
6
5
Figure 2A. DIP Pin Connections
1
2
3
4
AI00873
8
7
6
5
D
VSS
C
HOLD
Q
W
S
VCC
M950x0
Figure 2B. SO and TSSOP Pin Connections
DESCRIPTION
(cont’d)
2/20
M95040, M95020, M95010
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M95010BN | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95010-BN3 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95010-BN3/W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95010-BN3G | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95010-BN3G/W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
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