參數(shù)資料
型號(hào): M95020-RDW3TP/W
廠商: STMICROELECTRONICS
元件分類: PROM
英文描述: 256 X 8 SPI BUS SERIAL EEPROM, PDSO8
封裝: 0.169 INCH, ROHS COMPLIANT, TSSOP-8
文件頁(yè)數(shù): 5/42頁(yè)
文件大?。?/td> 250K
代理商: M95020-RDW3TP/W
M95040, M95020, M95010
Operating features
4
Operating features
4.1
Hold Condition
The Hold (HOLD) signal is used to pause any serial communications with the device without
resetting the clocking sequence.
During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data
Input (D) and Serial Clock (C) are Don’t Care.
To enter the Hold condition, the device must be selected, with Chip Select (S) Low.
Normally, the device is kept selected, for the whole duration of the Hold condition.
Deselecting the device while it is in the Hold condition, has the effect of resetting the state of
the device, and this mechanism can be used if it is required to reset any processes that had
been in progress.
The Hold condition starts when the Hold (HOLD) signal is driven Low at the same time as
Serial Clock (C) already being Low (as shown in Figure 5).
The Hold condition ends when the Hold (HOLD) signal is driven High at the same time as
Serial Clock (C) already being Low.
Figure 5 also shows what happens if the rising and falling edges are not timed to coincide
with Serial Clock (C) being Low.
Figure 5.
Hold Condition activation
4.2
Status Register
Figure 6 shows the position of the Status Register in the control logic of the device. This
register contains a number of control bits and status bits, as shown in Table 5. For a detailed
description of the Status Register bits, see Section 6.3: Read Status Register (RDSR).
AI02029D
HOLD
C
Hold
Condition
Hold
Condition
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