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參數(shù)資料
| 型號： | M95020-RDW3TP/W |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | PROM |
| 英文描述： | 256 X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 0.169 INCH, ROHS COMPLIANT, TSSOP-8 |
| 文件頁數(shù)： | 9/42頁 |
| 文件大小： | 250K |
| 代理商： | M95020-RDW3TP/W |
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M95040, M95020, M95010
Instructions
6.2
Write Disable (WRDI)
One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction
to the device.
As shown in Figure 8, to send this instruction to the device, Chip Select (S) is driven Low,
and the bits of the instruction byte are shifted in, on Serial Data Input (D).
The device then enters a wait state. It waits for a the device to be deselected, by Chip Select
(S) being driven High.
The Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:
●
Power-up
●
WRDI instruction execution
●
WRSR instruction completion
●
WRITE instruction completion
●
Write Protect (W) line being held Low.
Figure 8.
Write Disable (WRDI) sequence
C
D
AI03790D
S
Q
2
1
34567
High Impedance
0
Instruction
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PDF描述 |
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| M95020-WMN3G/W | 256 X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| M95256-RDW3/A | 32K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| M95256-RMN6P/A | 32K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| M95256-WDW3T/A | 32K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M95020-RDW6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-RDW6/W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-RDW6G | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-RDW6G/W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-RDW6P | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
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