參數(shù)資料
型號(hào): MACH210A-7
廠商: Lattice Semiconductor Corporation
英文描述: High-Density EE CMOS Programmable Logic
中文描述: 高密度電子工程CMOS可編程邏輯
文件頁(yè)數(shù): 3/47頁(yè)
文件大?。?/td> 347K
代理商: MACH210A-7
11
MACH210A-7 (Com’l)
CAPACITANCE (Note 1)
Parameter
Symbol
Parameter Description
Test Conditions
Typ
Unit
CIN
Input Capacitance
VIN = 2.0 V
VCC = 5.0 V, TA = 25
°C,
6
pF
COUT
Output Capacitance
VOUT = 2.0 V
f = 1 MHz
8
pF
SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges
Parameter
Symbol
Parameter Description
Min
Max
Unit
tPD
Input, I/O, or Feedback to Combinatorial Output
7.5
ns
tS
Setup Time from Input, I/O or Feedback to Clock
D-Type
5.5
ns
T-Type
6.5
ns
tH
Register Data Hold Time
0
ns
tCO
Clock to Output
5ns
tWL
Clock Width
LOW
3
ns
tWH
HIGH
3
ns
D-Type
100
MHz
T-Type
91
MHz
fMAX
D-Type
133
MHz
T-Type
125
MHz
166.7
MHz
tSL
Setup Time from Input, I/O, or Feedback to Gate
5.5
ns
tHL
Latch Data Hold Time
0
ns
tGO
Gate to Output
6ns
tGWL
Gate Width LOW
3
ns
tPDL
Input, I/O, or Feedback to Output Through
9.5
ns
Transparent Input or Output Latch
tSIR
Input Register Setup Time
2
ns
tHIR
Input Register Hold Time
2
ns
tICO
Input Register Clock to Combinatorial Output
11
ns
tICS
Input Register Clock to Output Register Setup
D-Type
9
ns
T-Type
10
ns
tWICL
Input Register Clock Width
LOW
3
ns
tWICH
HIGH
3
ns
fMAXIR
Maximum Input Register Frequency
166.7
MHz
tSIL
Input Latch Setup Time
2
ns
tHIL
Input Latch Hold Time
2
ns
tIGO
Input Latch Gate to Combinatorial Output
12
ns
tIGOL
Input Latch Gate to Output Through Transparent Output Latch
14
ns
tSLL
Setup Time from Input, I/O, or Feedback Through
7.5
ns
Transparent Input Latch to Output Latch Gate
Maximum
Frequency
External Feedback
Internal Feedback (fCNT)
No Feedback
-7
相關(guān)PDF資料
PDF描述
MACH215-12JC High-Density EE CMOS Programmable Logic
MACH215-15JC High-Density EE CMOS Programmable Logic
MACH215-12 High-Density EE CMOS Programmable Logic
MACH221SP-12YC High-Performance EE CMOS Programmable Logic
MACH221SP-15YC SUR ABSORBER 7MM 430V 1250A ZNR
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MACH210A7JC 制造商:AMD 功能描述:*
MACH210A-7JC 制造商:LATTICE 制造商全稱(chēng):Lattice Semiconductor 功能描述:High-Density EE CMOS Programmable Logic
MACH210A-7VC 制造商:Rochester Electronics LLC 功能描述:- Bulk
MACH210AQ-12 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:High-Density EE CMOS Programmable Logic
MACH210AQ-12JC 制造商:LATTICE 制造商全稱(chēng):Lattice Semiconductor 功能描述:High-Density EE CMOS Programmable Logic