參數(shù)資料
型號(hào)： MAX11040GUU+
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 24/35頁(yè)
文件大小： 0K
描述： IC ADC 24BIT 4CH 38-TSSOP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 50
位數(shù)： 24
采樣率（每秒）： 64k
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 4
功率耗散（最大）： 108mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 38-TFSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 38-TSSOP
包裝： 管件
輸入數(shù)目和類型： 4 個(gè)差分，雙極
配用： MAXSPCSPARTAN6+-ND - ADC and DAC Eval Expansion Board
MAX11040K/MAX11060
24-/16-Bit, 4-Channel, Simultaneous-Sampling,
Cascadable, Sigma-Delta ADCs
30
Maxim Integrated
Applications Information
Multiple Device Synchronization
Synchronizing Multiple Devices
Using a Shared XIN Clock Source
To synchronize multiple devices sharing a single XIN
clock source, transition the SYNC input that is shared
by all devices high to low. When an external sync
source is not available, connect DRDYOUT of the last
device to the SYNC input of all devices in the chain.
The devices ignore any SYNC transitions applied dur-
ing the power-on reset.
Synchronizing Multiple Devices
Using Independent XIN Clock Sources
If it is undesirable to connect the XIN clock sources
together, due to EMI or other reasons; use DRDYIN,
DRDYOUT, and SYNC to align the conversion timing as
shown in Figure 18. This minimizes the effects of drift
between the clock sources by resynchronizing after
each conversion when DRDYOUT transitions low. In
this configuration, the maximum correction caused by a
SYNC edge is one XIN clock cycle.
The resulting sampling rate is determined by the sampling
frequency of the device with the slowest clock source,
plus the delay through the DRDYIN to DRDYOUT chain
between this slowest device and the end of the chain.
Synchronizing Multiple Devices
to an Independent Clock Source
To periodically synchronize multiple devices to an inde-
pendent timing source, connect the timing source to
the SYNC inputs of the devices. If minimal jitter is
important in the application, program the devices to a
frequency slightly slower than the external frequency,
such that SYNC falling edges only occur a short time
after the DRDYOUT signals.
MAX11040K
MAX11060
SYNC
CS
SCLK
DIN
CASCIN
DRDYIN
DRDYOUT
FAULT
OVRFLW
DOUT
XIN
DEVICE n+1
DEVICE 0
DEVICE n
MAX11040K
MAX11060
SYNC
CS
SCLK
DIN
CASCIN
DRDYIN
CASCOUT
FAULT
OVRFLW
DOUT
XIN
XOUT CLKOUT
MAX11040K
MAX11060
SYNC
CS
SCLK
DIN
CASCIN
DRDYIN
CASCOUT
DRDYOUT
FAULT
OVRFLW
DOUT
XIN
XOUT
DRDYOUT
DSP OR
MICROCONTROLLER
CASCADE UP TO 8 DEVICES
Figure 18. One Crystal per Device and All SYNC Inputs Driven by DRDYOUT of the Last Device in the Chain
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX11040GUU/GH9 制造商:Maxim Integrated Products 功能描述:- Rail/Tube
MAX11040GUU+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24Bit 4Ch Simul-Samp Cascadable Sig Delt RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX11040GUU+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24Bit 4Ch Simul-Samp Cascadable Sig Delt RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX11040K 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:24-/16-Bit, 4-Channel, Simultaneous-Sampling, Cascadable, Sigma-Delta ADCs
MAX11040K_1111 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:24-/16-Bit, 4-Channel, Simultaneous-Sampling, Cascadable, Sigma-Delta ADCs
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