Input Voltage Range
Internal protection diodes that clamp the analog input
to VDD and GND allow the input pin (CH0) to swing
from (GND - 0.3V) to (VDD + 0.3V) without damage.
However, for accurate conversions, the inputs must not
exceed (VDD + 50mV) or be less than (GND - 50mV).
Input Bandwidth
The ADC’s input tracking circuitry has a 4MHz small-
signal bandwidth, so it is possible to digitize high-
speed transient events and measure periodic signals
with bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques. Anti-alias filtering is
recommended to avoid high-frequency signals being
aliased into the frequency band of interest.
Serial Interface
The MAX1115/MAX1116 have a 3-wire serial interface.
The CNVST and SCLK inputs are used to control the
device, while the three-state DOUT pin is used to
access the conversion results.
The serial interface provides connection to microcon-
trollers (Cs) with SPI, QSPI, and MICROWIRE serial
interfaces at clock rates up to 5MHz. The interface sup-
ports either an idle high or low SCLK format. For SPI
and QSPI, set CPOL = CPHA = 0 or CPOL = CPHA = 1
in the SPI control registers of the C. Figure 5 shows
the MAX1115/MAX1116 common serial-interface con-
nections. See Figures 6a–6d for details on the serial-
interface timing and protocol.
MAX1115/MAX1116
Single-Supply, Low-Power, Serial 8-Bit ADCs
_______________________________________________________________________________________
7
VDD
I/O
SCK (SK)
MISO (SI)
GND
DOUT
SCLK
CONVST
GND
VDD
0.1
F
1
F
CH0
ANALOG
INPUTS
MAX1115
MAX1116
CPU
VDD
Figure 3. Typical Operating Circuit
GND
CHOLD
CAPACITIVE DAC
VDD
2
COMPARATOR
16pF
RIN
6.5k
AUTO-ZERO
RAIL
TRACK
HOLD
CH0
Figure 4. Equivalent Input Circuit
CONVST
SCLK
DOUT
I/O
SCK
MISO
SS
a) SPI
CONVST
SCLK
DOUT
CS
SCK
MISO
+3V
SS
b) QSPI
MAX1115
MAX1116
MAX1115
MAX1116
MAX1115
MAX1116
SCLK
DOUT
I/O
SK
SI
c) MICROWIRE
+3V
Figure 5. Common Serial-Interface Connections