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參數(shù)資料
| 型號(hào)： | MAX1359BETL+ |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 28/71頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAS 16BIT 40-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS） |
| 分辨率（位）： | 16 b |
| 采樣率（每秒）： | 21.84k |
| 數(shù)據(jù)接口： | 串行 |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 1.8 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 40-TQFN-EP（6x6） |
| 包裝： | 管件 |
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MAX1358B
16-Bit, Data-Acquisition System with ADC, DACs,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
34
______________________________________________________________________________________
Single-Pole/Double-Throw (SPDT) Switches
The MAX1358B provides two uncommitted SPDT switch-
es. Each switch has a typical 35
Ω on-resistance. Control
the switches through the SW_CTRL register, the PWM
output, and/or a UPIO port configured to control the
switches (UPIO1–UPIO4_CTRL register).
Pulse-Width Modulator (PWM)
A single 8-bit PWM is available for various system tasks
such as LCD bias control, sensor bias voltage trim,
buzzer drive, and duty-cycled sleep-mode power-con-
trol schemes. PWM input clock sources include the
4.9512MHz FLL output, the 32kHz clock, and frequen-
cy-divided versions of each. Although most Cs have
built-in PWM functions, the MAX1358B PWM is more
flexible by allowing the UPIO outputs to be driven to
DVDD or regulated CPOUT logic-high voltage levels.
For duty-cycled power-control schemes, use the
32kHz-derived input clock. The PWM output is avail-
able independent of C power state. The FLL is typical-
ly disabled in sleep-override mode.
Serial Interface
The MAX1358B features a 4-wire serial interface con-
sisting of a chip select (
CS), serial clock (SCLK), data
in (DIN), and data out (DOUT).
CS must be low to allow
data to be clocked into or out of the device. DOUT is
high impedance while
CS is high. The data is clocked
in at DIN on the rising edge of SCLK. Data is clocked
out at DOUT on the falling edge of SCLK. The serial
interface is compatible with SPI modes CPOL = 0,
CPHA = 0 and CPOL = 1, CPHA = 1. A write operation
to the MAX1358B takes effect on the last rising edge of
SCLK. If
CS goes high before the complete transfer, the
write is ignored. Every data transfer is initiated by the
command byte. The command byte consists of a start
bit (MSB), R/
W bit, and 6 address bits. The start bit
must be 1 to perform data transfers to the device.
Zeros clocked in are ignored. For SPI pass-through
mode, see the
UPIO_SPI Register section. An address
byte identifies each register. Table 4 shows the com-
plete register address map for this family of DAS.
Figures 14, 15, and 16 provide timing diagrams for
read and write commands.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX1359BETL+ | 功能描述:數(shù)據(jù)轉(zhuǎn)換系統(tǒng) 16-Bit 2Ch .512ksps 3.6V Precision SoIC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率:0.001 MSPs 分辨率:24 bit 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| MAX1359BETL+T | 功能描述:數(shù)據(jù)轉(zhuǎn)換系統(tǒng) 16-Bit 2Ch .512ksps 3.6V Precision SoIC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率:0.001 MSPs 分辨率:24 bit 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| MAX1359BETL-T | 功能描述:數(shù)據(jù)轉(zhuǎn)換系統(tǒng) RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率:0.001 MSPs 分辨率:24 bit 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| MAX135C/D | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX135CP1 DC/94 | 制造商:INT 功能描述:135C |
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