參數(shù)資料
型號: MAX1359BETL+
廠商: Maxim Integrated Products
文件頁數(shù): 67/71頁
文件大?。?/td> 0K
描述: IC DAS 16BIT 40-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 50
類型: 數(shù)據(jù)采集系統(tǒng)(DAS)
分辨率(位): 16 b
采樣率(每秒): 21.84k
數(shù)據(jù)接口: 串行
電壓電源: 模擬和數(shù)字
電源電壓: 1.8 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-TQFN-EP(6x6)
包裝: 管件
MAX1358B
16-Bit, Data-Acquisition System with ADC, DACs,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
_______________________________________________________________________________________
7
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = +1.8V to +3.6V, VREF = +1.25V, external reference, fCLK32K = 32.768kHz (external clock), CREG = 10F, CCPOUT =
10F, 10F between CF+ and CF-, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25
°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Capacitance
SNO_, SNC_, or SCM_ = AVDD or AGND;
switch connected to enabled mux input
2.5
pF
CHARGE PUMP
Maximum Output Current
IOUT
10
mA
No load
3.2
3.3
3.6
Output Voltage
IOUT = 10mA
3.0
V
Output-Voltage Ripple
IOUT = 10mA, excluding ESR of external
capacitor (Note 2)
50
mVP-P
Load Regulation
IOUT = 10mA, excluding ESR of external
capacitor
15
20
mV/mA
REG Input Voltage Range
Internal linear regulator disabled (Note 2)
1.6
1.8
V
REG Input Current
Linear regulator off, charge pump off
3
nA
CPOUT Input Voltage Range
Charge pump disabled
1.8
3.6
V
CPOUT Input Leakage Current
Charge pump disabled
2
nA
SIGNAL-DETECT COMPARATOR
TSEL[2:0] = 0 hex
0
TSEL[2:0] = 4 hex
50
TSEL[2:0] = 5 hex
100
TSEL[2:0] = 6 hex
150
Differential Input-Detection
Threshold Voltage
TSEL[2:0] = 7 hex
200
mV
Differential Input-Detection
Threshold Error
±10
mV
Common-Mode Input Voltage
Range
VAGND
AVDD
V
Turn-On Time
45
s
VOLTAGE MONITORS
DVDD Monitor Supply Voltage
Range
For valid reset (Note 7)
1.4
3.6
V
Trip Threshold (DVDD Falling)
1.80
1.85
1.95
V
DVDD Monitor Timeout Reset
Period
1.5
s
HYSE bit set to logic 1
225
DVDD Monitor Hysteresis
HYSE bit set to logic 0
40
mV
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