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參數(shù)資料
| 型號： | MAX19712ETN+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 20/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ANLG FRNT END 56-TQFN |
| 產(chǎn)品變化通告： | Product Discontinuation 09/Jun/2011 |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 10 |
| 通道數(shù)： | 2 |
| 功率（瓦特）： | 50mW |
| 電壓 - 電源，模擬： | 3V |
| 電壓 - 電源，數(shù)字： | 3V |
| 封裝/外殼： | 56-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 56-TQFN-EP（7x7） |
| 包裝： | 帶卷 (TR) |
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______________________________________________________________________________________
27
MAX19712
10-Bit, 22Msps, Full-Duplex
Analog Front-End
______________________________________________________________________________________
27
clock by the appropriate divisor (set with bits AD7,
AD8, and AD9; see Table 16) and provides the conver-
sion clock to the auxiliary ADC. The auxiliary ADC has a
maximum conversion rate of 333ksps. The maximum
conversion clock frequency is 4MHz (333ksps x 12
clocks). Choose the proper divider value to keep the
conversion clock frequency under 4MHz, based upon
the system CLK frequency supplied to the MAX19712
(see Table 16). The total conversion time (tCONV) of the
auxiliary ADC can be calculated as tCONV = (12 x
NAVG x NDIV) / fCLK; where NAVG is the number of
averages (see Table 15), NDIV is the CLK divisor (see
Table 16), and fCLK is the system CLK frequency.
Reading DOUT from the Aux-ADC
DOUT is normally in a high-impedance condition. Upon
setting the auxiliary ADC start conversion bit (bit AD0),
DOUT becomes active and goes high, indicating that
the aux-ADC is busy. When the conversion cycle is
complete (including averaging), the data is placed into
an output register and DOUT goes low, indicating that
the output data is ready to be driven onto DOUT. When
bit AD10 is set (AD10 = 1), the aux-ADC enters a data
output mode where data is available at DOUT on the
next low assertion of
CS/WAKE. The auxiliary ADC data
is shifted out of DOUT (MSB first) with the data transi-
tioning on the falling edge of the serial clock (SCLK).
Since a DOUT read requires 16 bits, DOUT holds the
value of the last conversion data bit for the last 6 bits (6
least significant bits) following the aux-ADC conversion
data. DOUT enters a high-impedance state when
CS/WAKE is deasserted high. When bit AD10 is cleared
(AD10 = 0), the aux-ADC data is not available on DOUT
(see Table 17).
After the aux-ADC completes a conversion, the data
result is loaded to an output register waiting to be shift-
ed out. No further conversions are possible until data is
shifted out. This means that if the first conversion com-
mand sets AD10 = 0, AD0 = 1, then it cannot be fol-
lowed by conversion commands setting AD10 = 0, AD0
= 1 or AD10 = 1, AD0 = 1. If this sequence of com-
mands is inadvertently used then DOUT is disabled. To
resume normal operation set AD0 = 0.
AD1
SELECTION
0
Internal 2.048V Reference (Default)
1
Internal VDD Reference
Table 13. Auxiliary ADC Reference
Table 14. Auxiliary ADC Input Source
AD3
AD2
Aux-ADC INPUT SOURCE
0
ADC1 (Default)
0
1
ADC2
10
VDD / 2
11
OVDD / 2
Table 12. Auxiliary ADC Convert
AD0
SELECTION
0
Aux-ADC Idle (Default)
1
Aux-ADC Start-Convert
Table 15. Auxiliary ADC Averaging
Table 16. Auxiliary ADC Clock (CLK)
Divider
AD6
AD5
AD4
Aux-ADC AVERAGING
0
1 Conversion (No Averaging) (Default)
0
1
Average of 2 Conversions
0
1
0
Average of 4 Conversions
0
1
Average of 8 Conversions
1
0
Average of 16 Conversions
1
0
1
Average of 32 Conversions
1
X
Average of 32 Conversions
AD9
AD8
AD7
Aux-ADC CONVERSION CLOCK
0
CLK Divided by 1 (Default)
0
1
CLK Divided by 2
0
1
0
CLK Divided by 4
0
1
CLK Divided by 8
1
0
CLK Divided by 16
1
0
1
CLK Divided by 32
1
0
CLK Divided by 64
1
CLK Divided by 128
X = Don’t care.
Table 17. Auxiliary ADC Data Output
Mode
AD10
SELECTION
0
Aux-ADC Data is Not Available on DOUT (Default)
1
Aux-ADC Enters Data Output Mode Where
Data is Available on DOUT
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| MAX19712EVCMODU+ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX19710/13 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX19712EVKIT | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 10-Bit 22Msps Full-Duplex Analog Front-End RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX19712EVKIT+ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX19710/13 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX19713C/D+GG3 | 功能描述:ADC / DAC多通道 Ultra-Low Power AFE with Integrated Tx DACs Rx ADCs and Auxiliary Control Data Converters RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX19713C/D-GG3 | 功能描述:ADC / DAC多通道 10-Bit 45Msps Full-Duplex Analog Front-End RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
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